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davidgmarcus
Observer
Observer
6,196 Views
Registered: ‎09-04-2014

mmcme2_adv

I am having trouble trying to get my test bench to produce an frequency out of the MCM.  I am using a 33 MHz clk but there doesn't seem to be any output from the MMCME2.  I attached my files.  AM i doing something wrong?

 

 

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ralfk
Xilinx Employee
Xilinx Employee
6,135 Views
Registered: ‎10-11-2007

Are you simulation for a long enough time? Until LOCKED goes high?

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scottconnors
Observer
Observer
6,132 Views
Registered: ‎06-25-2014

You currently have a 1 ns reset pulse.  I don't know for certain, but I believe you need to increase that to meet the minimum pulse width requirement for the MMCM.  You comment says 100 ns pulse, so try that instead.

scottconnors
Observer
Observer
6,121 Views
Registered: ‎06-25-2014

Found this in the ds181_Artix_7_Data_Sheet.pdf document...

 

MMCM_RSTMINPULSE Minimum reset pulse width 5.00 ns

 

Your tiny reset might be throwing the MMCM for a loop.

 

 

 

 

ralfk
Xilinx Employee
Xilinx Employee
6,120 Views
Registered: ‎10-11-2007

5ns pulse width is the reset requirement. See datasheet please!

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davidgmarcus
Observer
Observer
5,849 Views
Registered: ‎09-04-2014

Even with the 5ns pulse the mmcme2 does not seem to be wokring.  I made the reset 10 ns since it needs a min of 5ns and locked out seems to be wrong still.

 

mmcm.png

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morgan198510
Voyager
Voyager
5,827 Views
Registered: ‎04-21-2014

David,

 

When using vendor provided models, such as Xilinx's MMCM_ADV model, it is often useful to look at your simulation output.

 

You might notice an error, such as:

 

"Error:  Input Error : RST on instance   must be asserted for 3 CLKIN clock cycles."

 

So, based on that, change your process in your testbench to this:

 

  RST_PROCESS: process
   begin  
      -- hold reset state 3 clock in periods
        RST_IN <= '1';
        wait until CLKIN_IN = '1';
        wait until CLKIN_IN = '0';
        wait until CLKIN_IN = '1';
        wait until CLKIN_IN = '0';
        wait until CLKIN_IN = '1';
        wait until CLKIN_IN = '0';
        RST_IN <= '0';
      wait;
   end process RST_PROCESS;

 

Anyway, it looks like either the datasheet needs to change to match the MMCM_ADV model xilinx provides, or the model needs to change to match the 5 nS specification. 

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