04-02-2018 11:20 PM
The xapp524 reference design, will it work in FPGA for 1 wire mode? Because I have doubt on frame clock block. Is anybody proved in FPGA?
04-10-2018 02:41 AM
04-11-2018 06:51 AM
As per logic of Frame clock block, The derived frame clock from BUFR should vary according to mode (1 wire or 2 wire). But it doesn't happen in the provided design. Kindly reply to this query.