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Explorer
Explorer
8,815 Views
Registered: ‎03-06-2014

How to see CLK_IN signal in Virtex-5 at Oscilloscope??

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Hello everybody,

 

I am working on DCM operating at 450MHz in Virtex-5 FPGA with SPEED GRADE -1 in MAXIMUM SPEED. I used an internal clocking by setting the clock on LOC = AG18 in UCF. I would like to know how can I monitor this signal with oscilloscope. The board that I use is Xilinx Gensys Virtex-5 with XC5VLX50T device. Also, the PMOD connectors in this board are located in AD11, AD9,...

 

Thank you,

 @balkris 

 

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Adventurer
Adventurer
516 Views
Registered: ‎08-30-2018

Re: How to see CLK_IN signal in Virtex-5 at Oscilloscope??

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Hi,

I just saw your post by chance while searching for an answer to my concern.

As the other member said, if you want to monitor an output clock, connect it to a clock-capable IO (CCIO) pin and bring it out. If you want to monitor an INPUT clock as well, simply tie that clock to an IBUFG and bring it out. IBUFG is capable to do what you need.

 

Hope it helps...

Daryon

3 Replies
Historian
Historian
8,800 Views
Registered: ‎02-25-2008

Re: How to see CLK_IN signal in Virtex-5 at Oscilloscope??

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@msdarvishi wrote:

Hello everybody,

 

I am working on DCM operating at 450MHz in Virtex-5 FPGA with SPEED GRADE -1 in MAXIMUM SPEED. I used an internal clocking by setting the clock on LOC = AG18 in UCF. I would like to know how can I monitor this signal with oscilloscope. The board that I use is Xilinx Gensys Virtex-5 with XC5VLX50T device. Also, the PMOD connectors in this board are located in AD11, AD9,...

 


So you want to monitor the DCM output? You have to bring it out to a pin.

----------------------------Yes, I do this for a living.
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Explorer
Explorer
8,794 Views
Registered: ‎03-06-2014

Re: How to see CLK_IN signal in Virtex-5 at Oscilloscope??

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I want to monitor the CLK0_OUT and CLKIN signals in DCM at the same time on oscilloscope. The CLK0_OUT is easy to bring it out, but I do not know how to bring out CLKIN and monitor it? CLKIN is xoming from an internal clock...

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Adventurer
Adventurer
517 Views
Registered: ‎08-30-2018

Re: How to see CLK_IN signal in Virtex-5 at Oscilloscope??

Jump to solution

Hi,

I just saw your post by chance while searching for an answer to my concern.

As the other member said, if you want to monitor an output clock, connect it to a clock-capable IO (CCIO) pin and bring it out. If you want to monitor an INPUT clock as well, simply tie that clock to an IBUFG and bring it out. IBUFG is capable to do what you need.

 

Hope it helps...

Daryon