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4,210 Views
Registered: ‎07-07-2017

KC705 GPIO SMA Connectors

The standard on the connector (j13&j14) is lvcmos25, voltage level at which the xilinx fpga can detect the signal which is coming from the KC705 GPIO sma connectors??

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13 Replies
Xilinx Employee
Xilinx Employee
4,201 Views
Registered: ‎08-01-2012

Re: KC705 GPIO SMA Connectors

In KC705 user SMA GPIO connectors default IO standards is LVCMOS25 (2.5V). The voltage levels detection is as per JEDEC international standard (https://www.jedec.org/)

 

 

NET USER_SMA_GPIO_P LOC = Y23 | IOSTANDARD=LVCMOS25; 
NET USER_SMA_GPIO_N LOC = Y24 | IOSTANDARD=LVCMOS25; 

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Community Manager
Community Manager
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Registered: ‎07-23-2015

Re: KC705 GPIO SMA Connectors

@shyam_sridharan To add to above, these signals are part of Bank 12 whose VCCO is controlled by VADJ_FPGA. 

 

VADJ_FPGA supports 1.8V, 2.5V (default), 3.3V. Upon default power on, it will be 2.5V and so LVCMOS25 will work for these pins. 

If you program the VADJ to any other voltage, LVCMOS25 will not be applicable anymore and you will need to modify based on the VADJ_FPGA voltage. 

 

This is something you need to be aware of. 

- Giri
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4,166 Views
Registered: ‎07-07-2017

Re: KC705 GPIO SMA Connectors

Thanks for the response quickly
What i meant was that how much voltage can the pins detect (eg if my input voltage on the pin is 2.4V or 2.6V can the pins with lvcmos25 detect those voltage if so how much it can tolerate in voltage change and detection ) ?

Thanks in advance
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4,163 Views
Registered: ‎07-07-2017

Re: KC705 GPIO SMA Connectors

Thanks for the quick response 

 

I meant to ask if there is any blip in voltage such as 2.4V or 2.6V what is the maximum and minimum voltage the pin can detect if i use LVCMOS25 ( do give it in percentage or range of voltage )?

 

Thanks in advance

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Community Manager
Community Manager
4,114 Views
Registered: ‎07-23-2015

Re: KC705 GPIO SMA Connectors

@shyam_sridharan 

 


 I meant to ask if there is any blip in voltage such as 2.4V or 2.6V what is the maximum and minimum voltage the pin can detect if i use LVCMOS25 ( do give it in percentage or range of voltage )?

 


The answer to this question lies in Table 9 of DS182  Kintex Data sheet. 

Check VIH (min & max levels)

- Giri
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3,993 Views
Registered: ‎07-07-2017

Re: KC705 GPIO SMA Connectors

Hi i wanted to use GPIO Pin in KC705 board.

But i don't see LVCMOS25 in the drop down list of elaborated design when i select Y23 pin in vivado 2015.4.

I am stuck at this point.

I have attached the screenshot

Y23_1.png
Y23_2.png
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Community Manager
Community Manager
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Registered: ‎07-23-2015

Re: KC705 GPIO SMA Connectors

@shyam_sridharan Because trig_p/trig_n are  defined as differential signals in the design and so you will notice only Differential signals in drop down box

- Giri
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3,980 Views
Registered: ‎07-07-2017

Re: KC705 GPIO SMA Connectors

@gnaraharthe User GPIO pin is also differential with positive(Y23) and negative pins (Y24) so can you please elaborate ?

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Community Manager
Community Manager
3,977 Views
Registered: ‎07-23-2015

Re: KC705 GPIO SMA Connectors

@shyam_sridharan From your schematic, you have trig_p and trig_n as differential signals right? 

 

So if you try to map them to GPIO USER SMA pins Y23 & Y24, you need to define them with Differential Signal IO Standard. Do not go by the XDC in Appendix C of UG810 KC705 user guide. It specifies these pins as LVCMOS25 under the assumption you will drive a Single Ended Signal. 

 

In your design since you have trig_p/n as differential, you are expected to provide a Differential IO Standard and not LVCMOS25. 

 

If you can describe what you plan to drive onto the SMA pins, that will help understand what you are trying to achieve. 

- Giri
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2,492 Views
Registered: ‎07-07-2017

Re: KC705 GPIO SMA Connectors

Yes i am giving trig_p and trig_n as differential signals..!!!

 

My requirement is that i need to give the trigger input to the KC705 board and use that trigger to enable a flip flop based counter (that runs in system clock frequency)

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Community Manager
Community Manager
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Registered: ‎07-23-2015

Re: KC705 GPIO SMA Connectors

@shyam_sridharan Then you shouldn't worry about setting these pins to LVCMOS25. Set it to the differential standard you will be driving these signals from. For. e.g. if you are driving from an external device using LVDS signalling, assign LVDS to these 2 pins. 

 

Not sure why you raised the query about "not finding LVCMOS25". Am I missing something here? 

- Giri
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Visitor aladas
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Registered: ‎07-31-2018

Re: KC705 GPIO SMA Connectors

Sorry to open this topic again, if I use the config of xdc:

#GPIO USER SMA

set_property PACKAGE_PIN Y24 [get_ports USER_SMA_GPIO_N]

set_property IOSTANDARD LVCMOS25 [get_ports USER_SMA_GPIO_N]

set_property PACKAGE_PIN Y23 [get_ports USER_SMA_GPIO_P]

set_property IOSTANDARD LVCMOS25 [get_ports USER_SMA_GPIO_P]

 

Then I can use these ports to drive two single-ended signals? Or with this I can only buf the differential signal and drive one single-ended signal?

Is there a way to use it for two differents single-ended signals?

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Community Manager
Community Manager
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Registered: ‎07-23-2015

Re: KC705 GPIO SMA Connectors

@aladas 


 

Is there a way to use it for two differents single-ended signals?


You can use it as LVCMOS25 single ended on each pin provided your VADJ_FPGA voltage is 2.5V. 

- Giri
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Keep conversing, give Kudos and Accept Solution when you get one.
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