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DMA for PCI Express AER Support (Gen2 PCIe / Kintex 7)

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Participant
Posts: 29
Registered: ‎06-25-2012
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DMA for PCI Express AER Support (Gen2 PCIe / Kintex 7)

Does the DMA for PCI Express IP support PCIe Advanced Error Reporting (AER) for PCIe Gen 2 designs?

 

According to PG195, v3.1, pg 8, it indicates "AER (only PCIe 3.x core)". Does this mean a PCIe Gen 3 core? Or version 3.x of the Integrated Block for PCI Express?

 

I am assuming it means a PCIe Gen3 core. If this is the case it must be a design decision to not implement AER in the DMA IP since the 7 series Integrated Block for PCI Express does support AER.


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Xilinx Employee
Posts: 79
Registered: ‎06-29-2011

Re: DMA for PCI Express AER Support (Gen2 PCIe / Kintex 7)

Hi,

 

Yes this indicated the Gen3 IP and it is not supported for Gen2 and is supported only for Gen3.

I have done some testing locally with a KC705 when I opened the configuration wizard for that IP, I see AER is not enabled. If I do the same for VC709, I see AER enabled. So the PG is correct.

 

Kind regards,
Gareth

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Xilinx Employee
Posts: 79
Registered: ‎06-29-2011

Re: DMA for PCI Express AER Support (Gen2 PCIe / Kintex 7)

Hi,

 

Yes this indicated the Gen3 IP and it is not supported for Gen2 and is supported only for Gen3.

I have done some testing locally with a KC705 when I opened the configuration wizard for that IP, I see AER is not enabled. If I do the same for VC709, I see AER enabled. So the PG is correct.

 

Kind regards,
Gareth

--------------------------------------------------------------------------------------------
Please mark the post as an answer "Accept as solution" in case it helped resolve your query.
Give kudos in case a post in case it guided to the solution.