09-14-2017 02:52 AM
I executed the test for Root Port Model Test Bench for Endpoint of the pcie.
Than I integrate the Root Port Model Test Bench for Endpoint in my testbench, The pcie that I used in my design have the same configuration of the pcie in the example design (endoint). I run the test, but the I can't execute write (I use TSK_TX_MEMORY_WRITE_64 as the use in the test of the example design - the only params of the task that I changed is the address). I got no w_valid. What can caue it?
09-15-2017 09:24 AM