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Example design for pcie - Root Port Model Test Bench for Endpoint

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Participant
Posts: 61
Registered: ‎08-15-2016

Example design for pcie - Root Port Model Test Bench for Endpoint

I executed the test for Root Port Model Test Bench for Endpoint of the pcie.

Than I integrate the Root Port Model Test Bench for Endpoint in my testbench, The pcie that I used in my design have the same configuration of the pcie in the example design (endoint). I run the test, but the I can't execute write (I use TSK_TX_MEMORY_WRITE_64 as the use in the test of the example design -  the only params of the task that I changed is the address). I got no w_valid. What can caue it?

Moderator
Posts: 2,273
Registered: ‎02-16-2010

Re: Example design for pcie - Root Port Model Test Bench for Endpoint

Can you explain some more details about the address you are trying to write to? Can you do a read to this address successfully?
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