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Visitor prashanthim
Visitor
1,064 Views
Registered: ‎09-20-2016

Looking for Zynq Ultrascale+ MPSoC PCIe PS side example block design

Hi,

I am working on Zynq Ultrascale+ MPSoC EG series.

I need some clarification on PCIE ps side,that is how to write data from PL-DMA to PS-PCIE??

 

Thank You.

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2 Replies
Xilinx Employee
Xilinx Employee
1,057 Views
Registered: ‎08-01-2008

Re: Looking for Zynq Ultrascale+ MPSoC PCIe PS side example block design

You can find some example here
https://www.xilinx.com/support/answers/62821.html

 

youu can check this XAPPs as well

 

 

XAPP1289 -  Using DMA with Zynq UltraScale+ MPSoC Controller for PCI Express as Root Port Application Note ( ver1.0, 584 KB ) [PDF]

Provides an example that demonstrates how to configure and use the DMA in the Controller for PCI Express® when configured as a Root Port.
Associated File(s)



Hope it may help you

Thanks and Regards
Balkrishan
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Visitor prashanthim
Visitor
967 Views
Registered: ‎09-20-2016

Re: Looking for Zynq Ultrascale+ MPSoC PCIe PS side example block design

Thank you for your reply..

but which datasheet are mentioned in the reply those are all related to zynq7000.

but i am working on Zynq Ultrascale+ MPSoC device. there are no exported ports of pcie express in Zynq Ultrascale+ MPSoC IP in vivado17.2.

i am not under standing that how to connect PL-DMA to PS-PCIE.

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