06-03-2018 01:28 AM
Hi,
I am simulating pcie3_7x_0_ex in VCSMX and the CFGPHYLINKSTATUS of B_PCIE_3_0 keeps low which results in user_reset asserted and failed to pass the test.
The same test passed in Vivado simulation.
Any suggestions?
thanks.
06-04-2018 02:21 PM
06-04-2018 05:38 PM
06-05-2018 08:25 PM
06-07-2018 09:00 AM
06-07-2018 05:36 PM
06-07-2018 05:45 PM
06-11-2018 04:28 PM
I tried the simulation of IP example design with the default options of the GUI. The simulation has successfully completed with VCS simulator 2016.06. I have attached .xci file of the IP used to test.
If you can give the .xci file of the IP with you, it can help to use the same IP that you are using.
06-11-2018 05:49 PM
06-29-2018 03:13 PM
06-29-2018 03:17 PM
06-29-2018 10:20 PM
07-10-2018 12:31 PM
Can you check the solution mentioned in the AR#67172? I found the simulation is running fine after updating the options during the elaborate stage. I checked this in 2016.3 and 2018.2.
https://www.xilinx.com/support/answers/67172.html
If you are using the GUI flow, try to do the setting as shown in the snapshot below.
One more thing to note, please check the OS support for the VCS simulator version you are using. When I tried the simulation in Ubuntu 16.04.03 OS, I got a warning message saying the OS is not supported in the vlogan.log file.