I have ML605 board, and want to config it as a PCI express card. I use it as DMA mechanism. So the card has configuration space, and this space is BAR0.
If Host memory read data from PCI expreses Card, CPU need to write configuration information to BAR0, and PCI express Card will auto send the data flow to Host memory with MWr TLPs. The data come from card's DDR3 memory, and this memory space was mapped to BAR1.
My question is that if Host memory does not need write data to PCI express card, the BAR1 does not need to map and the card has only 1 BAR because BAR1's function is filtering the address.