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Registered: ‎05-30-2019

In-System Programming of BPI PROM using PCI Express 1 lane

Hello,

I am trying to implement In-System Programming of BPI PROM on the Kintex xc7k160tffg676-2 FPGA. I found XAPP518 and was able to download KC705 design and import it into Vivado 2017.4. I was able to complete synthesis and implementation (didn't lock pins). The problem is this KC705 design uses eight lane PCI Express core and my board connecting to a System on a Module(SOM) only have a one lane PCI Express.  Does anyone have some experience in this area and can tell me if I can modified this KC705 design from an eight lane PCIe to a one lane PCIe? Also, approximately how long you think this task will take because of the difficulty.

I look a little deeper into this KC705 example design and see that the main eight lane PCIe block, xilinx_pcie_2_1_ep_7x.v, is version 1.6 (XAPP518 was last updated in 2014)  and I created a one lane PCIe version of this from the Vivado 2017.4 IP Catalog and it was version 3.3. A lot of the codes were stripped out in the 3.3 version since it was meant as a standalone and not interfacing with a BPI programming state machine through another Buffer block. Can I take this new one lane PCIe and create a new Buffer block (mentioned in the XAPP518) and integrate with the existing BPI programming state machine block (programmer.v) from the KC705 example design?

Any feedback is greatly appreciated! I'm trying to get some ideas from people who are more experienced in PCIe, BPI PROM, and In System Programming to understand if this is a difficult tasks and might take some time to get it working. 

If anyone know of any other exisitng example of In-System Programming of BPI PROM using PCIe please let me know.

Thank you,

Pete 

 

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