10-10-2016 02:18 AM
I am using the ML555 board with the xapp859 application.
I have tried the JTAG configuration mode of ML555, it works.
Then I tried the master SelectMAP mode, it doesn't work.
The mcs file have been programmed into the PROM and the headers have been set as the recommended setting.
I guess the problem is that I haven't programmed the CPLD mode.
So I want to know Where Can I find the CPLD(CoolRunner-2 XC2C32) image for ML555 board?
the following picture is the configuration skematic of ML555.From it, I think the CPLD should be programmed to connect the flash and the fpga.
thanks a lot for your help,
10-10-2016 02:34 AM
I did google this problem and scan the ML555 UG. The UG says there is a default image programmed into the device to permit configuration for the virtex-5 FPGA.Maybe I have erased the CPLD.
So the last solution maybe is to write a CPLD image by hand :(
10-10-2016 05:14 AM