ML555 configuration problem

michael_12 · ‎10-10-2016

hello,

I am using the ML555 board with the xapp859 application.

I have tried the JTAG configuration mode of ML555, it works.

Then I tried the master SelectMAP mode, it doesn't work.

The mcs file have been programmed into the PROM and the headers have been set as the recommended setting.

I guess the problem is that I haven't programmed the CPLD mode.

So I want to know Where Can I find the CPLD(CoolRunner-2 XC2C32) image for ML555 board?

the following picture is the configuration skematic of ML555.From it, I think the CPLD should be programmed to connect the flash and the fpga.

thanks a lot for your help,

Minghui

michael_12 · ‎10-10-2016

I did google this problem and scan the ML555 UG. The UG says there is a default image programmed into the device to permit configuration for the virtex-5 FPGA.Maybe I have erased the CPLD.

So the last solution maybe is to write a CPLD image by hand :(

balkris · ‎10-10-2016

you can find all the documents here
http://www.xilinx.com/products/boards/ML555/docs.htm

Thanks and Regards
Balkrishan
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cloudmage · ‎11-26-2020

The web page is invalid. Could you please provide a new url?