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Adventurer
Adventurer
554 Views
Registered: ‎06-24-2011

PCIE RX Compliance Test / Lane Reversal

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A very simple PCIE4 GEN3x8 example design is generated in Zynq Ultrascale+ xczu7cg-fbvb900-2-e at PL side.

I only modified the pin assignment to match our custom card. Everything else is generated by Vivado.

"lspci" command shows GEN3x8, no problem. DMA example is performed, no error. Files can be transferred between Add-in card and host. Everything looks good.

Then we send our Add-in card to the compliance test lab before going to PCI-SIG workshop.

Lane 0 and Lane 7 are tested individually, i.e. test lane 0 first, then test lane 7.

TX compliance test is passed on both lane 0 and lane 7.

But RX compliance test is passed only at lane 0 . Lane 7 can enter the compliance loopback mode, but there is no output signal observed. The LTSSM does show complinace.loopback state at this point.

Lab people suggested that there might be some "lane swap" feature should be turned on. Because lane 7 along should not work in general. But if the IP "thinks" it is lane 0 instead of lane 7, it can work.

I found it sounds like "Lane Reversal" parameter control. So I change "PL_DISABLE_LANE_REVERSAL" to FALSE. I even change this parameter at the top 2 layers modules to ensure the parameter can be passed into the design. See pic01 ~ pic04.

Well, there is no registers nor signals I can probe to prove that configuration is set. So the card is back to the lab, however the result is the same as above, TX compliance test is OK but RX compliance test at lane 7 still not observing output signal at compliance.loopback mode.

Question:

1. On PG213 (pic05), it looks like Lane Reversal only supported when "Integrated Block Advertised Lane Width" = "Negotiated Lane Width". Is that right?

2. In my test case it is "Integrated Block Advertised Lane Width" = "Negotiated Lane Width" = 1. But this is not on the table. Does "x1" support in lane reversal case?

3. I check the PCI-SIG website, it clearly shows the VCU118 evaluation board pass the compliance test. Could some Xilinx guy  teach me how you pass the RX compliance test on lane 7?

Please advise, thank you.

 

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Xilinx Employee
Xilinx Employee
357 Views
Registered: ‎08-06-2008

Hi,

This is not supported and the spec doesn't support this either. There is no lane reversal with only lane-7. Perhaps you could convey the feedback from us and pci-sig and see what they respond. At this point, we are not sure why the recommendation was made to do the test on lane-7 too.

Thanks.

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Xilinx Employee
Xilinx Employee
453 Views
Registered: ‎08-06-2008

In case of a multi-lane design, TX compliance is done on Lane 0, 3, 7, and 15. But RX LEQ is done only on Lane 0. There is no requirement for electrical RX test to be done on lanes other than Lane0. Could you let us know the details on the requirement to test RX for lanes other than 0?

Thanks.

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Adventurer
Adventurer
444 Views
Registered: ‎06-24-2011

Hi Deepeshm,

Thanks for the reply. Interestingly I contact PCI-SIG Compliance support (in US) and they said exactly the same thing: RX test only need to do at lane 0.

Here is what they said:

The Tx tests for an x8 device are performed at lanes 0, 3 and 7. The Rx tests are performed at lane 0 only and that is probably why lane 7 is failing during the pretests. More information about testing at a PCI-SIG Compliance Workshop can be found at https://members.pcisig.com/wg/PCI-SIG/document/8452

The internal swap that your tester is referring to is called ‘lane reversal’ and this is an optional implementation. There is no need to implement ‘lane reversal’ in order to pass compliance tests.

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However our card is manufactured in Taiwan, where we are going to have compliance test. There people said RX test need to do at lane 0 and lane 7. What they did is just repeat whatever they did at lane 0 and do it again at lane 7. 

That's how "lane reversal" comes up to the screen. So in this case, does Xilinx IP support it?

Please advise, thank you.

 

 

Highlighted
Xilinx Employee
Xilinx Employee
358 Views
Registered: ‎08-06-2008

Hi,

This is not supported and the spec doesn't support this either. There is no lane reversal with only lane-7. Perhaps you could convey the feedback from us and pci-sig and see what they respond. At this point, we are not sure why the recommendation was made to do the test on lane-7 too.

Thanks.

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