cancel
Showing results for 
Show  only  | Search instead for 
Did you mean: 
chintan_tag
Observer
Observer
1,016 Views
Registered: ‎12-03-2018

PCIe core pl_ltssm_state stuck to 00100

Hi,

I have instantiated the PCIe example design on the ZC706 board and debugging via ILA. I was able to see the Xilinx PCI device 7024 on the host upon lspci enumeration. But now (with no change to the design, but just repowering the setup), lspci does not show the xilinx core on the list of PCI devices. Also, the user_lnk_up is static to '0' and pl_ltssm_state is stuck to "00100". Any thoughts on where to debug next?

 

Thanks
Chintan

0 Kudos
4 Replies
venkata
Moderator
Moderator
990 Views
Registered: ‎02-16-2010

@chintan_tag

I find pl_ltssm_state is a 6-bit signal with 7-series Gen2 hard block. Can you let us know the 6-bit value on pl_ltssm_state signal?

------------------------------------------------------------------------------
Don't forget to reply, give kudo and accept as solution
------------------------------------------------------------------------------
0 Kudos
chintan_tag
Observer
Observer
981 Views
Registered: ‎12-03-2018

Hi Venkata,

The PL_LTSSM State value is stuck at "0x80" -> "001000"

0 Kudos
venkata
Moderator
Moderator
966 Views
Registered: ‎02-16-2010

@chintan_tag

I believe you meant 0x08 --> "001000". This is "8: Polling Compliance, Send_Pattern"

When you repower the setup, do you follow the steps below? If not, can you try this sequence?

1. Keep the host machine powered OFF

2. Program the FPGA

3. Power on the host machine

------------------------------------------------------------------------------
Don't forget to reply, give kudo and accept as solution
------------------------------------------------------------------------------
0 Kudos
hello1
Visitor
Visitor
369 Views
Registered: ‎10-29-2020

Hello, FPGA as the host, using PL_LTSSM =8, how to solve, thank you

0 Kudos