UPGRADE YOUR BROWSER

We have detected your current browser version is not the latest one. Xilinx.com uses the latest web technologies to bring you the best online experience possible. Please upgrade to a Xilinx.com supported browser:Chrome, Firefox, Internet Explorer 11, Safari. Thank you!

cancel
Showing results for 
Search instead for 
Did you mean: 
Highlighted
Observer mengmcxl
Observer
391 Views
Registered: ‎07-16-2019

PS PCIe DMA

Hi,

I need to use MPSOC PS PCIe to move data block between PS DDR4 and host memory. My issue is host cannot access the PS AXIPCIe DMA registers.

 

0 Kudos
9 Replies
Moderator
Moderator
302 Views
Registered: ‎02-16-2010

Re: PS PCIe DMA

Hi @mengmcxl 

Whether PCIe link up is completed?

------------------------------------------------------------------------------
Don't forget to reply, give kudo and accept as solution
------------------------------------------------------------------------------
0 Kudos
Observer mengmcxl
Observer
287 Views
Registered: ‎07-16-2019

Re: PS PCIe DMA

yes, PCIe link is up, host can see it with command lspci.

 

0 Kudos
Observer r1200gsa
Observer
255 Views
Registered: ‎03-15-2018

Re: PS PCIe DMA

To access DMA registers you need to activate dma_enable in DREG_CONTROL in AXIPCIE_MAIN module

Philippe

 

0 Kudos
222 Views
Registered: ‎10-17-2019

Re: PS PCIe DMA

How did you do that please let me know which address we need to write. i am using microblaze instead of mpsoc. and i want to see simulation first and want to link up DAM/Bridge Subsytem PCIe xilinx EP ip
0 Kudos
Observer r1200gsa
Observer
167 Views
Registered: ‎03-15-2018

Re: PS PCIe DMA

Please take a look into the ug1087 document:

https://www.xilinx.com/html_docs/registers/ug1087/ug1087-zynq-ultrascale-registers.html

@ 0xFD0E0288

 

0 Kudos
Visitor rahul090192
Visitor
161 Views
Registered: ‎04-29-2019

Re: PS PCIe DMA

Hi sir in this link there are lots of things are there which is most important things please tell me and you did link up of the ip ..how did you achieve this please tell me

0 Kudos
Visitor rahul090192
Visitor
156 Views
Registered: ‎04-29-2019

Re: PS PCIe DMA

How did you achieve this sir. Could you please tell me or share your project from that I can get

0 Kudos
Observer mengmcxl
Observer
100 Views
Registered: ‎07-16-2019

Re: PS PCIe DMA

Host Software can access PS DMA registers, but zynq software cannot access those registers. are the registers ok to be access by both sides ?

 

0 Kudos
43 Views
Registered: ‎10-17-2019

Re: PS PCIe DMA

okay. But i have mapped Microblaze with EP(DMA/Bridge subsystem xilinx ip configured in EP) and RC(DMA/Bridge subsystem xilinx ip configured in RC mode) through AXI interconnect. and these Both the ip's connected to each other with PIPE interface in same desgin. So when i am trying to simulate it directly i am not getting linkup. why?

0 Kudos