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157 Views
Registered: ‎08-14-2018

QDMA/XDMA PCIe BAR size configuration

Hello, 

If I set the PCIe BAR (AXI bridge master) size of a QDMA or XDMA to 512MB or more, the server connected to the FPGA via PCIe might not boot. However, when using the "AXI bridge for PCIe" IP, setting the PCIe BAR size to 8GB worked fine. So, I'd like to know if there are any restrictions when setting the PCIe BAR size for QDMA or XDMA.

Thanks,

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Xilinx Employee
Xilinx Employee
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Registered: ‎07-26-2012

Re: QDMA/XDMA PCIe BAR size configuration

These phenomena are seen depending on the OS and BIOS. Even with the same design, moving EP cards to different platforms will have different symptoms.


So far, it has been reported that the system freezes in the range of 4GB-1GB, but 512B is also possible because it depends on OS and BIOS.