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Observer
Observer
2,018 Views
Registered: ‎02-10-2017

QDMA with Tandem Configuration

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I am attempting to configure a QDMA IP block for Tandem PROM configuration, but there is either a bug in the customization interface or it is not yet supported for my device (XCKU15P).

 

I have previously configured an XDMA IP block for Tandem PROM configuration of this same device, and it works in hardware.  When I attempt to configure the QDMA IP with the same settings, the "Tandem Configuration or Partial Reconfiguration" drop-down menu is always grayed-out at the bottom (see attached image).

 

The latest QDMA documentation (PG302) does not mention any limitations on the Tandem Configuration setting, but no matter what combination of changes I make to the customization the Tandem configuration never becomes available.  The only change is that when I select PCIe Block Location X1Y0 the "Tandem Configuration or Partial Reconfiguration" drop-down menu gets wider, implying that it is prepared to offer choices but it remains unselectable.

 

Please advise on whether Tandem Configuration is supported within the QDMA IP, and if so when the customization interface bug will be repaired.

 

Kind Regards, Matt Keener

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QDMA_no_Tandem.png
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Xilinx Employee
Xilinx Employee
528 Views
Registered: ‎11-17-2008

That is correct, at least in terms of the option in the PCIe IP.  We have only ever added the PR over PCIe option when we add Tandem Configuration to a core.  But that doesn't mean you couldn't send partial bitstreams over this end point -- see XAPP1338 for a methodology for fast PR over PCIe.  This solution does not use the configuration port inside the PCIe end point (the MCAP), rather it uses the ICAP, which is a much faster solution.

An update on my post above from a year ago: we investigated the possibility of supporting Tandem Configuration for the QDMA core and have found that it is not a good match for the technology.  The QDMA core is very demanding in terms of timing closure, and the addition of Tandem Configuration requirements (exclusive floorplan, logical isolation, etc.) pushed the core beyond these limits.  Tandem for QDMA is on the "future considerations" list but is not currently tied to any release.

That said, we can consider adding the option to enable the MCAP for PR (now called DFX, or Dynamic Function eXchange) over PCIe for the QDMA core.  This addition does not require a floorplan (for the PCIe IP part) or increase the timing closure challenge (again, for the PCIe IP), so it is a relatively easy change.  We will look at the possibility of this addition this year.

thanks,

david.

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Moderator
Moderator
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Registered: ‎02-16-2010
It seems the feature is not yet supported. It could get added in a future release.
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1,689 Views
Registered: ‎03-22-2013

Hello everyone,

I'm currently using QDMA in our project and we are very worried about the non supported Tandem function...

In the new vivado release 2018.3 and in the QDMA v3.0 document, there is not mention about that Tandem function is not working!!!

Do you have more info about that?

 

Best regards,

Christian Lambricht

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Xilinx Employee
Xilinx Employee
1,554 Views
Registered: ‎11-17-2008

@christian.lambricht, @keener_cc,

Tandem Configuration support for the QDMA version of the PCIe IP core is in the queue (no pun intended) for 2019.  We plan on starting with our u200 and then u250 Alveo acceleration boards, then expanding to support more devices.  I cannot guarantee an exact release/date as priorities must shift to meet demand and available engineering resources, but our hope is to have initial support in 2019.1 -- these plans are subject to change.  This item must be scheduled alongside things like streaming core and DMA core support for newer UltraScale+ devices and base Versal support. 

thanks,

david.

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Observer
Observer
1,469 Views
Registered: ‎02-10-2017

Hi David, thanks for the reply.

Given the delay on that feature availability, it would be appreciated if PG302 were updated to mention that Tandem is not yet supported for certain devices.  The Tandem Configuration section of the "Customizing and Generating the Subsystem" section or the "Minimum Device Requirements" section seem like reasonable places to include a note on the currently supported devices.

Kind Regards,

Matt Keener

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Moderator
Moderator
1,445 Views
Registered: ‎02-11-2014

Hello @keener_cc, @christian.lambricht,

I can file a Change Request to get the documentation updated with respect to tandem support.

Thanks,
Cory

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Visitor
Visitor
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Registered: ‎09-13-2019

Any update on this?

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Visitor
Visitor
852 Views
Registered: ‎12-19-2018
Hi,
Does Tandem configuration will be release along with 2019.2?

Thanks.
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Newbie
Newbie
555 Views
Registered: ‎01-07-2020

Hi @davidd ,

Does this mean QDMA does not support Partial Reconfiguration also?

Thanks,

Musthafa V

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Highlighted
Xilinx Employee
Xilinx Employee
529 Views
Registered: ‎11-17-2008

That is correct, at least in terms of the option in the PCIe IP.  We have only ever added the PR over PCIe option when we add Tandem Configuration to a core.  But that doesn't mean you couldn't send partial bitstreams over this end point -- see XAPP1338 for a methodology for fast PR over PCIe.  This solution does not use the configuration port inside the PCIe end point (the MCAP), rather it uses the ICAP, which is a much faster solution.

An update on my post above from a year ago: we investigated the possibility of supporting Tandem Configuration for the QDMA core and have found that it is not a good match for the technology.  The QDMA core is very demanding in terms of timing closure, and the addition of Tandem Configuration requirements (exclusive floorplan, logical isolation, etc.) pushed the core beyond these limits.  Tandem for QDMA is on the "future considerations" list but is not currently tied to any release.

That said, we can consider adding the option to enable the MCAP for PR (now called DFX, or Dynamic Function eXchange) over PCIe for the QDMA core.  This addition does not require a floorplan (for the PCIe IP part) or increase the timing closure challenge (again, for the PCIe IP), so it is a relatively easy change.  We will look at the possibility of this addition this year.

thanks,

david.

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Observer
Observer
513 Views
Registered: ‎02-10-2017

David, thank you for your response to both the most recent question and a conclusion to the original question of Tandem Configuration for the QDMA core (i.e., NOT supported).

Given the definitive conclusion, I repeat my request for an update to PG302 regarding that conclusion.  As of the v3.0 (Nov. 22, 2019) version, it still lists "Tandem Configuration or Partial Reconfiguration" as available on page 210 under the Basic Tab configuration description page.

Kind Regards, Matt Keener

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