UPGRADE YOUR BROWSER

We have detected your current browser version is not the latest one. Xilinx.com uses the latest web technologies to bring you the best online experience possible. Please upgrade to a Xilinx.com supported browser:Chrome, Firefox, Internet Explorer 11, Safari. Thank you!

cancel
Showing results for 
Search instead for 
Did you mean: 
Highlighted
419 Views
Registered: ‎03-07-2019

Questa simulation of PCIe XDMA example design fails to achieve link up

Jump to solution

In short I have been troubleshooting an Questa 10.6c simulation issue where the PCIe fails to achive link.  LTSSM on the end point gets to 0x0C and then after a timeout period of some kind it returns to 0x00.  I created the XDMA example design and ran the behavioral simulation which worked fine in XSIM.  I then exported the simulation for Questa and ran that only to find the same lack of link up occured.

I read on the forum that a +define+SIMULATION +define+SIMULATION_MODE was required on the vlog statements, so I added that.  It did not effect the outcome.  Link still fails to come up in Questa 10.6c.  I tried a 2019 version of questa and got the same results. Any thoughts on what I could be dong wrong here?

Screen Shot 2019-03-28 at 2.44.22 PM.pngFailure to link in Questa 10.6c

Screen Shot 2019-03-28 at 2.47.34 PM.pngSuccessful link in Xsim

Tags (2)
0 Kudos
1 Solution

Accepted Solutions
Moderator
Moderator
361 Views
Registered: ‎02-16-2010

Re: Questa simulation of PCIe XDMA example design fails to achieve link up

Jump to solution

Hi rmaes@micron.com 

I believe you got this issue resolved by updating the following in simulate.do script.

#vsim -t 1ps -lib xil_defaultlib board_opt
vsim -lib xil_defaultlib board_opt

 

------------------------------------------------------------------------------
Don't forget to reply, give kudo and accept as solution
------------------------------------------------------------------------------

View solution in original post

0 Kudos
1 Reply
Moderator
Moderator
362 Views
Registered: ‎02-16-2010

Re: Questa simulation of PCIe XDMA example design fails to achieve link up

Jump to solution

Hi rmaes@micron.com 

I believe you got this issue resolved by updating the following in simulate.do script.

#vsim -t 1ps -lib xil_defaultlib board_opt
vsim -lib xil_defaultlib board_opt

 

------------------------------------------------------------------------------
Don't forget to reply, give kudo and accept as solution
------------------------------------------------------------------------------

View solution in original post

0 Kudos