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mm_uzair
Adventurer
Adventurer
5,887 Views
Registered: ‎11-17-2009

Reading writing/reading PCIe Bars

Hi,

 

I want to read/write the PCIe BARs using some logic (i mean some verilog/vhdl). Can any body help me with some related document/ application note or some sample code.

 

I am using virtex-5 lx50t device, ISE 11.4. I have generated the PCIe core using corgen but don't know how to proceed further.

 

 

Any type of help would be highly appreciated.

 

 

Regards,

OZ

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4 Replies
luisb
Xilinx Employee
Xilinx Employee
5,865 Views
Registered: ‎04-06-2010

When you generate the core in Coregen there's a PIO example design provided as well.

There's also a testbench provided with the core that allows you to test out the functionality of the core.

There's a test called "pio_writeReadBack_test0" that will write to all the BARs of the core and reads the values back.

 

You can read about this in the User Guide and the  Getting Started Guide:

http://www.xilinx.com/support/documentation/ip_documentation/pcie_blk_plus_gsg343.pdf

http://www.xilinx.com/support/documentation/ip_documentation/pcie_blk_plus_ug341.pdf

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kbandekar
Visitor
Visitor
5,438 Views
Registered: ‎01-20-2011

Hi,

 

I am using the sp605 board.

I want to integrate the pcie core.

I am following the simulation instructions provided by Xilinx but my simulation seems weird.

In the test environment I also do not have pio_writeReadBack_test0.

 

In simulation while debugging I am not able to get proper clocks i.e. trn_clk for tx data through the user logic.

My simulations I am running through is Modelsim.

 

Any feedback would be appreciated.

 

I would also like to know on the best practices to integrate the core / use the available core effectively with a custom design.

 

cheers,

Kunal

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deepeshm
Xilinx Employee
Xilinx Employee
5,436 Views
Registered: ‎08-06-2008

When you run the simuation script provided for modelsim, does it run?

Do you see any activity in the waveform window?

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luisb
Xilinx Employee
Xilinx Employee
5,392 Views
Registered: ‎04-06-2010

Can you also let us know what version of the core you're using?  I don't believe all of the versions of the core have the pio_writeReadBack_test0.  Only the latest version has it.

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