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Visitor
Visitor
1,467 Views
Registered: ‎11-10-2016

Xilinx Virtex7 XC7V2000TFLG1925-1 PCIe Phy PIPE mode, not able to break Rx Electrical Idle but doing receiver detection fine!

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Hello all,

I'm trying to use the Xilinx PCIe Phy (done in Vivado IP) to interface with a working Root Complex. I've been reading carefully the AR# 39380 and  the AR# 56616 but not able to get the Phy working as I'll explain below:

 

* Input reset_n is asserted (out of reset).

* TxDetectRx starts to wait for acknowledge of receiver detection process.

* RxStatus is 3'h3 (receiver detected).

* PhyStatus acknowledge the receiver detection.

* TxDetectRx is de-asserted.

 

After this process:

* PowerDown goes from P1 to P0 (3'h2 to 3'h0).

* TxElecIdle falls (Tx lane breaks electrical idle).

* LTSSM  (renamed as HS_ltssm) moves from 6'h1 to 6'h2 (Detect.Quiet to Detect.Active).

 

But after that, RxElecIdle is asserted forever, which means the link partner did not detect the PCIe, but it did, right?. Also the LTSSM is forever in 6'h3 (Detect active).

Also, followed the AR #56616, GT clocks and user flags seems ok:

  • GT_GTRXRESET == 0 ok.

  • GT_RXRESETDONE == 1 ok.

  • GT_RXUSERRDY == 1 ok.

  • GT_TXRESETDONE == 1 ok.

  • gt_rxresetdone == 1 ok.

  • gt_txresetdone == 1 ok.

I tried different Endpoints, different GT locations and a bunch of changes and didn't work. I'm using a fully working HAPS system (I didn't make the PCB by myself), so I'm here to see if someone of you could suggest something, as I'm out of ideas :(.

 

Thanks.

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Xilinx Employee
Xilinx Employee
1,733 Views
Registered: ‎08-07-2007

based on the last description, i don't think it is realetd to electrical problems.

 

I look into the first figure again, i guess the ltssm has something wrong.

the tx detect rx happened during ltssm =1 (detect quiet)

it suppose to happen during detect active.

 

how is the ltssm generated?

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Xilinx Employee
Xilinx Employee
1,433 Views
Registered: ‎08-07-2007

so txelecidle goes low but rxelecidle keeps high.

this indicates the remote partner transmitter doesn't not detect Xilinx PCIe receiver but Xilinx transmitter can detect the receiver of remote device.

 

what's the capacitance of the AC decoupling?

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Visitor
Visitor
1,421 Views
Registered: ‎11-10-2016

Hi @borisq

I'm trying to get such info from Synopsys PCB developers, as this is not open for the user.

Meanwhile, if I remove all the logic around the Xilinx Phy (I mean if I remove Root Complex works, if I keep Root Complex and let in reset sate don't disturbing PHY, doesn't work) , as soon as I configure the FPGA, it instantially breaks the RxElecIdle (see the image), that does not make any sense.

I'm using an OneStop Systems OSS-ECA-1x4-1x16 expansion card, that is fully PCIe compliant (I'm still thinking this thing is not doing his work quite fine). Also, I did changed the endpoint to a VC707 board, a commercial PCIe board, and not able to get anything different unless I remove everything but the Xilinx PHY.

 

Do you think this is related to signal integrity/electrical problems?

 

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Xilinx Employee
Xilinx Employee
1,734 Views
Registered: ‎08-07-2007

based on the last description, i don't think it is realetd to electrical problems.

 

I look into the first figure again, i guess the ltssm has something wrong.

the tx detect rx happened during ltssm =1 (detect quiet)

it suppose to happen during detect active.

 

how is the ltssm generated?

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Adventurer
Adventurer
1,353 Views
Registered: ‎04-24-2012

Hi @borisq

I've been debugging this issue pretty hard. It seems that the sideband signals of the finger PCIe connector (or better known as PCIe cable) are not connected, I mean, the PERST, PRST_n, etc, so the link partner is in "reset mode" awaiting for the Root Complex to release reset, which does happen but as the pin is floating, it doesn't go to the PCIe cable.

 

All your help drove me to certain guessings, so I want to thank you for the amazing input, keep it going,

Will close the issue, even when I'm not fully tested yet the new bitfile (it takes a while).  By the way, I saw a lot of similar issues in the community, and they must be for the same reason, so we can redirect those people to read this thread.

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