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Adventurer
Adventurer
3,247 Views
Registered: ‎08-10-2017

no C2H channels enabled - AR65444

I'm using AR65444 drivers (https://www.xilinx.com/support/answers/65444.html)

 

OS : Ubuntu 16.04

Vivado 2017.2

VC707 Board - Virtex7 485T configured for PCIe Gen2 x8 

 

 

On executing ./run_tests.sh, I get 

Info: Number of enabled h2c channels = 2
Info: Number of enabled c2h channels = 0

 

On executing ./reg_rw /dev/xdma0_control 0x1000 w , the read 32 bit value is 0xffff6530. But I'm supposed to get 0x1fc10006.

 

I had configured for 2 channels each for H2C and C2H in the DMA for PCIe IP. And yet, I don't know why I'm getting this unknown value.

 

 

 

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16 Replies
Xilinx Employee
Xilinx Employee
3,236 Views
Registered: ‎08-06-2008

Re: no C2H channels enabled - AR65444

Hi,

 

Please check in Vivado 2018.1 and also try by selecting the same number of channels for both H2C and C2H. Currently, you have 2 and 0 respectively.

 

Thanks.

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Adventurer
Adventurer
3,227 Views
Registered: ‎08-10-2017

Re: no C2H channels enabled - AR65444

Is it necessary to uninstall 2017.2 to install 2018.1 ?
Can I have both versions running on the same machine ?
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Xilinx Employee
Xilinx Employee
3,219 Views
Registered: ‎08-06-2008

Re: no C2H channels enabled - AR65444

You can have both versions together.
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Adventurer
Adventurer
3,209 Views
Registered: ‎08-10-2017

Re: no C2H channels enabled - AR65444

Now I tried again with new drivers Xilinx_Answer_65444_Linux_Files_rel20180420.zip.

I used the same bitstream, that I generated ealier.

 

Now I see that number of c2h channels enabled = 2

 

 

In the same design, I had also enabled BAR with PCIe to AXI Translation 0x0000000000000000 (with 64 bit Enable unchecked)

I can see that BAR0 is for user and BAR1 is config BAR in dmesg logs (for the new driver).

I am getting a new error when I run reg_rw

 

./reg_rw /dev/xdma0_user 0x0000 w 0x12345678

 

Error at line 103, file reg_rw.c (22) [Invalid Argument] ==> mmap() function is failing.. What could be the reason for this error ?

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Adventurer
Adventurer
3,202 Views
Registered: ‎08-10-2017

Re: no C2H channels enabled - AR65444

For the invalid argument problem, the macro MAP_SIZE in file reg_rw.c needs to be changed to whatever was selected in DMA for PCIe IP settings.

 

It's is working now.

 

 

Thank you

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Adventurer
Adventurer
3,191 Views
Registered: ‎08-10-2017

no C2H channels enabled - legacy interrupt isr - AR65444 - new release

I am using the new drivers Xilinx_Answer_65444_Linux_Files_rel20180420.zip.

My design is using legacy interrupt. I see in dmesg log that legacy interrupt is configured, when the xdma module is loaded into kernel.

 

I noticed on dmesg log that the xdma_isr() is continuously being called even though design is not generating the legacy interrupt

 

On top of that, on running ./run_test.sh and ./reg_rw again, I'm getting the same error again -

./run_tests -------------------------------------------------> Number of c2h channels enabled = 0 

./reg_rw /dev/xdma0_control 0x1000 w ----------> 0xffff6530 

 

even with the new release Xilinx_Answer_65444_Linux_Files_rel20180420.zip

 

I can't seem to identify the problem.

Is it with the AR65444 drivers or with my Ubuntu PC or FPGA design ??

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Xilinx Employee
Xilinx Employee
3,134 Views
Registered: ‎08-06-2008

Re: no C2H channels enabled - legacy interrupt isr - AR65444 - new release

Hi,

Could you share your XCI file?
Also please post your log files of the tests you ran.
Could you also confirm if you are testing with 2018.1 or still working with 2017.2?

Thanks.


Thanks.
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Adventurer
Adventurer
3,081 Views
Registered: ‎08-10-2017

Re: no C2H channels enabled - legacy interrupt isr - AR65444 - new release

Hi @deepeshm

 

I am using the new drivers Xilinx_Answer_65444_Linux_Files_rel20180420.zip.

 

I have attached the following

  1. XDMA XCI file generated by Vivado 2017.2
  2. dmesg_log.txt contains output of the command dmesg just after executing load_driver.sh
  3. run_test_log.txt contains output of run_test.sh (The value of macro MAP_SIZE in reg_rw.c changed to 4*1024UL as per settings in XDMA IP)

 

Please observe dmesg_log.txt closely. The FPGA is idle and legacy interrupt is not being generated. And yet xdma_isr() is being executed continuously. This is not supposed to happen.

 

I would like to point out additional observations

  1. When I used the legacy drivers in AR65444, I got a similar output for run_test.sh as given in run_test_log.txt
  2. When I compiled the reg_rw.c with the default value of MAP_SIZE and then execute run_test.sh, the output showed
    Number of c2h channels enabled = 2   (expected output)
    But when I run reg_rw, I get the error Invalid Argument (errno = 22) . This is solved by changing the macro MAP_SIZE to the value chosen in XDMA IP, which 4 kilobytes in my case)
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Xilinx Employee
Xilinx Employee
3,028 Views
Registered: ‎08-06-2008

Re: no C2H channels enabled - legacy interrupt isr - AR65444 - new release

Hi,

 

Thanks for the update and the xci and log files.

 

Could you please confirm if the understanding below is correct?

 

If you update MAP_SIZE, you see the number of c2h channel is correctly detected as 2, run_test.sh works fine and also there is no issue with reg_rw? But in both cases you see repeated xdma_isr()?

 

We will proceed with further investigation after hearing back from you.

 

Thanks.

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Adventurer
Adventurer
2,668 Views
Registered: ‎08-10-2017

Re: no C2H channels enabled - legacy interrupt isr - AR65444 - new release

@deepeshm You misunderstood me. Let me clarify.

 

PCIe to AXI Lite Master Interface is enabled in DMA/Bridge Subsystem for PCIe IP in Vivado 2017.2

Size is 4 Kilobytes.

 

  1. Consider two cases w.r.t to the macro MAP_SIZE in reg_rw.c (This behaviour is observed with both legacy and 20th April 2018 release of AR65444 drivers)
    1. MAP_SIZE = 32 Kilobytes (default)
      Output of ./run_test.sh ==> Number of c2h channels enabled = 2 (Correct)
      Output of ./reg_rw /dev/xdma0_user 0x0000 w 0x12345678 ==> Error at line 103, file reg_rw.c (22) [Invalid Argument]    (this happens because MAP_SIZE [32 KB] and XDMA [4 KB] IP settings are not equal).
      Output of ./reg_rw /dev/xdma0_control 0x1000 w ==>  Read 32 bit value is 0x1fc10006  (Correct)

    2. MAP_SIZE = 4 Kilobytes (changed according to XDMA IP settings)
      Output of ./run_test.sh ==> Number of c2h channels enabled = 0 (Wrong)
      Output of ./reg_rw /dev/xdma0_user 0x0000 w 0x12345678 ==> Value written (Correct)
      Output of ./reg_rw /dev/xdma0_control 0x1000 w ==> Read 32 bit value is 0xffff6530 (Wrong)

  2. When  20th April 2018 release of AR65444 (Xilinx_Answer_65444_Linux_Files_rel20180420.zip) drivers are used, xdma_isr() function is executed continuously even though FPGA design is idle and doesn't trigger usr_irq_req of XDMA IP. Please refer to attachment dmesg_log.txt from message 9 of this thread. Whereas Legacy AR65444 drivers are working properly w.r.t xdma_isr().

 

I hope I have made myself clear.

 

Both issues are serious and need to be addressed thoroughly.

Thank You

Jagannath

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Xilinx Employee
Xilinx Employee
2,649 Views
Registered: ‎08-06-2008

Re: no C2H channels enabled - legacy interrupt isr - AR65444 - new release

Thanks for the clarification.

Let us look into this and get back to you.

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Xilinx Employee
Xilinx Employee
2,509 Views
Registered: ‎08-06-2008

Re: no C2H channels enabled - legacy interrupt isr - AR65444 - new release

Hi Jagannath,

The repeated xdma_isr call must be due to issue mentioned in the thread below:

https://forums.xilinx.com/t5/PCI-Express/Linux-XDMA-module-from-AR65444-rel20180420-ISR-called/m-p/867934#M11273

Could you please check?

 

Thanks.

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Adventurer
Adventurer
2,491 Views
Registered: ‎08-10-2017

Re: no C2H channels enabled - legacy interrupt isr - AR65444 - new release

Thank You @deepeshm

 

In that post, Mr. Jeff Simpson says, "I just noticed that the auto-connect for the DMA bridge attached a constant IP block to the usr_irq_req input with the value set to 1. (Vivado 2018.1). That seems to be continuously generating user interrupts. When that constant is changed to a 0, the problem goes away."

 

I mentioned in my earlier post that this continuous execution of xdma_isr() is observed only when Xilinx_Answer_65444_Linux_Files_rel20180420 drivers are used. Legacy drivers worked fine as far as xdma_isr() is concerned. If constant IP were the problem, he would have faced this issue even with legacy AR65444 drivers.

 

In my project, I do not have constant IP block connecting to usr_irq_req input of XDMA IP. The input for usr_irq_req is by default '0' at all times, except when generated by custom logic. 

 

 

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Explorer
Explorer
2,478 Views
Registered: ‎03-22-2016

Re: no C2H channels enabled - legacy interrupt isr - AR65444 - new release


I mentioned in my earlier post that this continuous execution of xdma_isr() is observed only when Xilinx_Answer_65444_Linux_Files_rel20180420 drivers are used. Legacy drivers worked fine as far as xdma_isr() is concerned. If constant IP were the problem, he would have faced this issue even with legacy AR65444 drivers.

In my project, I do not have constant IP block connecting to usr_irq_req input of XDMA IP. The input for usr_irq_req is by default '0' at all times, except when generated by custom logic. 


That was my initial thought as well, but the legacy driver *does* still show that user interrupts are being requested. It just doesn't continuously call the interrupt service routine and flood the logs / hose the system. As a result, I never noticed any symptoms.

While the default for usr_irq_req *should* be 0, I don't know that leaving that pin disconnected is going to produce that. I'd check in the implemented schematics of your design to see where that pin is being tied, or add a constant IP block in to tie it to 0.

 

(There are actually a LOT of other issues with this new driver that are preventing us from using it as well. We are working through them and trying to document/report them along the way).

Explorer
Explorer
2,250 Views
Registered: ‎03-22-2016

Re: no C2H channels enabled - legacy interrupt isr - AR65444 - new release

@jagannath- It looks like our two issues are unrelated. When I was seeing ISR being called continuously, I saw user_irq with a value of 0x00000001, indicating that user_irq_req was asserted.

 

I am now also seeing the same behavior that you are. ISR is being called continuously during transfers, but now with user_irq and ch_irq both showing 0 (indicating that there is no cause for the interrupt).

Adventurer
Adventurer
2,237 Views
Registered: ‎08-10-2017

Re: no C2H channels enabled - legacy interrupt isr - AR65444 - new release


I am now also seeing the same behavior that you are. ISR is being called continuously during transfers, but now with user_irq and ch_irq both showing 0 (indicating that there is no cause for the interrupt).


@jeffsimpson ISR is being called continuously "during transfers" ?

In my case ISR was being called as soon as load_driver.sh was executed. (I wasn't initiating any transfers from PC, and usr_irq_req of XDMA IP in FPGA design is 0)

 

Try legacy AR65444 drivers. When using the drivers in interrupt mode, I occasionally encountered the problem explained in https://forums.xilinx.com/t5/PCI-Express/PCIe-DMA-AR65444-driver-error-help/m-p/857245#M10933 . But I didn't face much issues when using the driver in polling mode.

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