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Visitor
Visitor
8,722 Views
Registered: ‎03-13-2009

kcpsm3 psm

hi there, i know it's a very basic question, but i am starting picoblaze using kcpsm3, i tried to do a delay, but for some reason it did's run like i wanted, i think i'm doing something bad, please somebody help me, thanks :)
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Xilinx Employee
Xilinx Employee
8,713 Views
Registered: ‎08-13-2007

It is a very general question. ;(

 

Posts that effectively state "it doesn't work" are very difficult for other readers to even hope to address or offer any meaningful suggestions. At a minimum, you should likely consider describing:

-what you are trying to do, e.g. what kind of delay (static or dynamic), from what event, how are measuring the end of the delay

-how you tried to implement it

-what it did instead. Was this in HDL simulation, an instruction set simulator, or real hardware?

-other relevent data as appropriate, your experience level, version of kcpsm3 and ISE, clock frequency & target hardware, flow (normal RTL through to .bit, data2mem overlay onto previous bitstream, JTAG bootloader, etc.)

-what you have ruled out as possible issues

-etc.

  

It could also be useful if you posted your code.

 

Also, if you haven't done it already, I would suggest you review the uclock example that ships with kcpsm3 (e.g. uclock.psm and UART_real_time_clock.pdf)?


bt

 

==
PS welcome to the forums.

At risk of sounding too negative above, I did want to clarify that my suggestions were sincerely intended to increase the likelihood of you receiving constructive feedback

Message Edited by timpe on 03-13-2009 11:48 PM
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Visitor
Visitor
8,569 Views
Registered: ‎03-19-2009

I am currently working on KCPSM3 and have got some success.

if you have any specific problem, please let me know by your personal email addres.

regds

Ammy

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Visitor
Visitor
8,567 Views
Registered: ‎03-19-2009

hello dear.

 

I have sucessfully run a PICOBLAZE application on SPARTAN 3.

each day i face new challenge.

 

My system has data coming from 4 different external asynchronous sources. 

 

 

System Abstract Diagram

======================

 

Data source1===>[Data Capture FSM1]===>[32x32 DPRAM1]===> | P|

Data source2===>[Data Capture FSM2]===>[32x32 DPRAM2]===> | I  |

Data source3===>[Data Capture FSM3]===>[32x32 DPRAM3]===> |C |===>[UART]

Data source4===>[Data Capture FSM4]===>[32x32 DPRAM4]===> |O |

 

*Data Source = External modules generating data

 

System Modules

=====================

 

Application uses 4 FSM, 4 32x32 DPRAM, 1 PICO BLAZE Controller , 1 UART

 

 

i have sucessfully tested my code for the part PICO==>UART !

 

I am having some issues with [32x32 DPRAM]==>PICO Part

 

as i think you are experienced FPGA Designer, i would like to have some help from you through out the project.

if you are willing to, i will be sending you complete code in .rar format.

to discuss many issues i am facing.

 

if you are willing to guide me through out the project, please let me know. 

 

Ammy

please reply to my personal email

aas.connect@gmail.com

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Visitor
Visitor
8,447 Views
Registered: ‎03-13-2009

hello, sorry i could't write again until now  :-| i contiue tryin to work whith picoblaze, first i used the kcpsm3.exe compiler, now i pblazeide, i made the assembler there and simulate it and runs like i want, but when i program it to spartan 3E xc3s500e fg320 just the leds are on (digilent nexys 2 starter kit), just when i divede the clock( divided in 10MHz) , PB try to do something........i put here the schematic and the code here, hope somebody could help me, thanks.

 

PD: i'm using ise 9.2i

 

 

VHDL "ROM_form.vhd", "ROM.vhd", "ROM" DSOUT $00 load sa,$AA jump mainloop delay: load s0,$ff loop3: load s1,$ff loop2: load s2,$ff loop1: subc s2,$01 jump nz, loop1 subc s1,$01 jump nz, loop2 subc s0,$01 jump nz, loop3 ret mainloop: call delay addc sa,$01 out sa,$00 jump mainloop

 PBaze with clock divider

 pblaze without clok divider

 

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Xilinx Employee
Xilinx Employee
8,429 Views
Registered: ‎09-05-2007

You can not just drive LED’s directly from out_port without using the WRITE_STROBE. You need to add an output register that is enabled by WRITE_STROBE and which normally decoded port_id as well. Please see page 65 of KCPSM3_Manual.pdf and make use of all the reference designs using PicoBlaze to see how these fundamentals design principles are implemented. Regards, Ken
Ken Chapman
Principal Engineer, Xilinx UK
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