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Visitor
Visitor
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Registered: ‎05-30-2018

AXI DMA MM2S clock from timer PWM

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Hello,

 

 

 

I am trying to use a timer's PWM output to time the operation of a DMA by connecting it to m_axi_mm2s_aclk.

This results in the buffer descriptor ring not getting started when XAxiDma_BdRingStart(TxRingInstance) is called - I inserted a while loop in XAxiDma_StartBdRingHw() to wait for the hardware to start and this resulted in my code getting stuck within it.

 

I was wondering if this is because my PWM frequency (ranging from 200 kHz to 40 MHz) happens to be smaller than both axi_lite_aclk and axi_sg_aclk (both set at 80 MHz).

 

If using PWM as a clock source for the DMA is not the way to go, is there another approach that will allow me to output different frequencies to a dedicated DAC without having to play around with the length and data of the BD ring? I need to output 50 frequencies in the span of 6 seconds so I am worried that modifying the content of the BD ring will not help me meet this target.

 

Best,

Yahia

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Mentor
Mentor
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Registered: ‎02-24-2014

Do you have an axi clock converter block installed in the AXI Stream data path?    You probably want to drive the DAC and the clock converter only with your PWM output, leaving everything else on the system clock.    The clock converter should provide back pressure to the AXI stream from the DMA.

Don't forget to close a thread when possible by accepting a post as a solution.

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Mentor
Mentor
776 Views
Registered: ‎02-24-2014

Do you have an axi clock converter block installed in the AXI Stream data path?    You probably want to drive the DAC and the clock converter only with your PWM output, leaving everything else on the system clock.    The clock converter should provide back pressure to the AXI stream from the DMA.

Don't forget to close a thread when possible by accepting a post as a solution.

View solution in original post

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Visitor
Visitor
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Registered: ‎05-30-2018

Thanks for the reply jmcclusk,

 

I did not have a clock converter so I added one right after the M_AXIS_MM2S output of the DMA and used the timer's PWM output to drive it. What ended up happening was the simple sampling of the DMA data with the carrier frequency being the PWM frequency. What I am hoping to achieve is the slowing down of the DMA instead.

 

 

 

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Mentor
Mentor
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Registered: ‎02-24-2014

Well, another approach is customizing your AXI stream to DAC interface..    you should be able to construct some RTL with a clock enable that only allows 1 sample per clock enable pulse, and then use the timer PWM output as a clock enable in this module.   You need to provide backpressure to the AXI stream, and a clock enable from the PWM should be able to to it.    Just be sure that the PWM signal is edge detected to provide a single clock cycle pulse.

Don't forget to close a thread when possible by accepting a post as a solution.
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Visitor
Visitor
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Registered: ‎05-30-2018

You were right the first time, I just forgot to set up a processor system reset with the PWM output as a clock source.

This puts pressure on the DMA to run at its pace.

 

Thank you for your help

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Explorer
Explorer
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Registered: ‎04-19-2018

Why do you clock a DMA with a PWM just out of curiosity? Maybe you want to play with frequency, in that case isn't there any other way, like a programmable clock?

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Visitor
Visitor
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Registered: ‎05-30-2018

I think you can do that; tbh I needed to control the output frequency of the of the DMA data while the DMA was running, so using PWM was the first idea that popped into my head.

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