01-16-2019 02:48 AM - edited 01-16-2019 03:21 AM
Greetings to everyone,
I am trying to gain experience with the AXI-DMA and for this purpose I am replicating step-by-step this tutorial (which is quite similirar to Xilinx 57562 example design):
from here:
http://www.fpgadeveloper.com/2017/10/using-axi-dma-in-vivado-reloaded.html
The only differences between my setup and the video tutorial is that I am using a Microzed 7020 board and Vivado 2018.1 Linux version, while the author is using a Microzed 7010 board and Vivado 2017.2 on Windows.
My setup also goes fine, I can generate the bitstream according to the steps shown in the video, I can launch the SDK, compile the software and run it, but the problem I experience is that I don 't see anything from the Zynq UART. It's like the program isn't running.
One strange thing I notice during application building in SDK, is that a warning is shown for the file xsdps.c at line 1272:
case CMD23: case ACMD23: case CMD24: case CMD25: 1272:--> RetVal |= RESP_R1 | (u32)XSDPS_DAT_PRESENT_SEL_MASK; case ACMD41: RetVal |= RESP_R3; break;
It seems that a break is missing. However, inserting a break doesn't change anything.
I experience the same problem executing an Hello World application: nothing is printed out from the Zynq serial console.
I also tried to execute a memtest application, and yes, I can see its output results (that maybe is indicating that something is wrong, notice the FAILED result):
--Starting Memory Test Application-- NOTE: This application runs with D-Cache disabled.As a result, cacheline requests will not be generated Testing memory region: ps7_ddr_0 Memory Controller: ps7_ddr_0 Base Address: 0x100000 Size: 0x3FF00000 bytes 32-bit test: FAILED! 16-bit test: FAILED! 8-bit test: FAILED! Testing memory region: ps7_ram_1 Memory Controller: ps7_ram_1 Base Address: 0xFFFF0000 Size: 0xFE00 bytes 32-bit test: PASSED! 16-bit test: PASSED! 8-bit test: PASSED! --Memory Test Application Complete--
I had the same problem testing the Xilinx 57562 example and also the previous tutorial of the video's author, which is here:
http://www.fpgadeveloper.com/2014/08/using-the-axi-dma-in-vivado.html
Could someone help me to understand what is going wrong and to find out the problem ?
Thank you in advance for your help.
Regards,
simozz
01-16-2019 04:29 AM
Hello,
Just two ideas:
- from a "memtest" application, remove the source files, and add the source file of the "hello world" application. If it works, it will mean that it is a wrong configuration of the application project and not an issue with the code.
- if you launch the application from the debugger, does the execution get stuck somewhere?
Best regards
01-16-2019 04:29 AM
Hello,
Just two ideas:
- from a "memtest" application, remove the source files, and add the source file of the "hello world" application. If it works, it will mean that it is a wrong configuration of the application project and not an issue with the code.
- if you launch the application from the debugger, does the execution get stuck somewhere?
Best regards
01-16-2019 07:11 AM - edited 01-16-2019 07:12 AM
Greetings @matt.zimm91,
- from a "memtest" application, remove the source files, and add the source file of the "hello world" application. If it works, it will mean that it is a wrong configuration of the application project and not an issue with the code.
I can confirm that changing that running the Hello World source code into the Memory Tests application's folder, I can see that the Hello World is printed out.
However, that one is a great suggestion. If I replace the memtest source code with the axidma examples, for example this is the output of the execution of xaxidma_example_sg_intr.c (of course with Scatter Gather Engine enabled).
--- Entering main() --- Dump registers 40400030: Control REG: 640B7002 Status REG: 000B0409 Cur BD REG: 7A000040 Tail BD REG: 0100FFC0
It does something so I can go on with my custom tests.
However I experienced the same issue with version 2017.2.This is quiet strange. I did not remember to have this kind of issue last year with other bare metal test.
I see that version 2018.3 is out and I will try it soon.
Regards,
simozz
11-25-2020 07:42 AM
Did you find out the solution?
I have the same problem as you had. I tried to put some print command during my AXI program, and it worked.
even with the examples of Xilinx it did not work as I want ( they just display the first sentence like Entering main() and that's all.
11-26-2020 04:02 AM
I solved using UIO concept, making my own user-space driver code.