05-17-2019 08:56 AM - edited 05-17-2019 08:58 AM
I'm using a ZYNQ device and i'm trying to interface an external device by mean of EPC core implemented in PL.
Accessing the device at base address (see code below) always triggers a Data-Abort handler.
Looking at signals with the oscilloscope the Chip-Select is actually moved but the transaction is closed before the slave device actually responds.
Searching the forum we have come up to this post Xil_Out16 abort handler but it seems to me that the memory region is mapped into MMU - the core is placed in PL at address 0x40600000 and the BSP in translation table registers it by default. Am I right?
.rept 0x0400 /* 0x40000000 - 0x7fffffff (FPGA slave0) */ .word SECT + 0xc02 /* S=b0 TEX=b000 AP=b11, Domain=b0, C=b0, B=b0 */ .set SECT, SECT+0x100000 .endr
epc access code
u16 foo = Xil_In16(0x40600000u);
Thanks in advance for your support,
05-17-2019 11:59 AM
You could add the ILA to the axi interface into axi EPC just to make sure the axi 'resp' values are good. I see that the core will respond via 'bresp' or 'rresp' when handling an 'abnormal termination'. Refiew PG127 sub section 'Abnormal Terminations' to make sure you are handling Prh_rdy correctly.
05-28-2019 06:35 AM
thanks for your hints, after "instrumenting" the device with the logic analyzer we discovered that the Prh_rdy signals was not awaited enogh time thus triggering the Abort Data Handler.
Thanks for your support,