06-07-2014 12:18 AM
06-11-2014 10:46 AM
I'm actually experiencing a similar problem. I have an AXI Interconnect with 3 masters. One master is a DMA core (NW Logic DMA Back-End), and two are AXI Datamover blocks. The slave interface on the Interconnect goes to a MIG7.
When I attach only two slaves interfaces, they seem to work fine. Once I add the 3rd master, the interconnect becomes a brick, and nothing gets through. Is this simply a bug in the core design itself?
06-12-2014 01:46 AM
I solved my problem by connecting my last "AXI-Master-Burst" instead of slave-port 3 on the axi-interconnect to slave-port 1 (and the MAster-Burst which was on slave-port to slave-port3). Until i change this all axi-interconnect members work fine.
I dont understand why because the AXI connections are for sure the same (check that in detail).
Maybe you can fix your problem in the same way.
06-14-2014 02:01 PM