cancel
Showing results for 
Show  only  | Search instead for 
Did you mean: 
Highlighted
637 Views
Registered: ‎12-11-2019

AXI_to_AXI cascading for Kintex7

Jump to solution

Hi!

I need to cascade two AXI_Interconnects in Kintex 7 because I have more than 16 slaves in my design. I saw AXI_to_AXI connector in Xilinx documentation but this does not support Kintex FPGA. Can someone elaboarte how to do that using Kintex 7? If there is an example, then it will be even more helpful.

Thanks,

Danial

0 Kudos
1 Solution

Accepted Solutions
Highlighted
564 Views
Registered: ‎07-23-2019

p1.png

Why people don't try before asking?

View solution in original post

7 Replies
Highlighted
Moderator
Moderator
576 Views
Registered: ‎11-09-2015

Hi dinatale.ds@gmail.com 

Could you clarify where in the documentation you saw the AXI_to_AXI connector?

I am quite sure you can cascade 2 AXI interconnects on Kintex-7.

Regards


Florent
Product Application Engineer - Xilinx Technical Support EMEA
**~ Don't forget to reply, give kudos, and accept as solution.~**
0 Kudos
Highlighted
565 Views
Registered: ‎07-23-2019

p1.png

Why people don't try before asking?

View solution in original post

Highlighted
Moderator
Moderator
555 Views
Registered: ‎11-09-2015

@archangel-lightworks wrote:

Why people don't try before asking?


Maybe because they want me to reach 2000 accepted solutions ;) (I am still surprised no one from the community answer this before as, as you said, this is an easy one as you could just try).

But if everybody was reading fully reading the doc, googling before asking, trying quickly or spend 10/15min debugging, the activity of the forums will probably dropping by 50%.


Florent
Product Application Engineer - Xilinx Technical Support EMEA
**~ Don't forget to reply, give kudos, and accept as solution.~**
Highlighted
511 Views
Registered: ‎12-11-2019

DS803 - LogiCORE™ IP
AXI to AXI Connector

0 Kudos
Highlighted
Moderator
Moderator
460 Views
Registered: ‎11-09-2015

Hi dinatale.ds@gmail.com 

Looking a the DS803 I see where your confusion is coming from.

My advise is to use the latest version of vivado and a block design to add IPs. It should have all the checks to tell you if the connection you want to do is possible or not.

Regards


Florent
Product Application Engineer - Xilinx Technical Support EMEA
**~ Don't forget to reply, give kudos, and accept as solution.~**
Highlighted
420 Views
Registered: ‎12-11-2019

Hi,

Thanks for your kind response. But I am working in non-project mode with Vivado 14.4
Is it possible for you to share a VHDL example of the cascading?

0 Kudos
Highlighted
418 Views
Registered: ‎12-11-2019

Hi,

I understand this cascading theoratically but since I am a newbie so I am stuck with the implementation. Can you please share a VHDL example of the same? I am restricted to work in non-project mode only with Vivado 14.4

0 Kudos