06-24-2019 07:41 AM
If I want to create my own Vivado IP, customize it and connect it to the zynq processing system,
1) How can I deduce the address range (window) for that IP? suppose I'm using a zynq SoC,
2) What is the problem of using an address range of 1 ( 2 to the power zero), since it's just a window used by the processor to designate to which the incoming data is to be addressed?
07-27-2019 04:23 AM
The address range depends on the number of address bits. So, you will likely have 32 bits. So 2 ^ 32 max.
However, if you connect this in IPI, the tools will handle the address range will be automated for you.
07-31-2019 08:20 AM
If you use an address range of 1, then you effectively say: this IP has only a single address in use, so the AXI interconnect need not send me any address and I expect the AXI interconnect to enable me only when my address is used. i.e.: You leave the whole address decoding to the interconnect.
It's more efficient for the interconnect if just claim a range of say 64k and to respond to any address by ignoring the address lines in your IP. It also leaves you the option to later implement more registers.