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Registered: ‎09-16-2019

After reloading core 1 firmware from core 0 (using AMP Linux-FreeRtos) sometimes interrupts on core 1 don't work


I have a sysmtem with Zync 7000 using Petalinux on core 0 and FreeRtos on core 1.

When I try to reload core 1 firmware from core 0 using AMP sometimes interrupts don't work on core 1.

I've notice that when it happens one bit o more bit of the ICDABRX registers are set (and sometimes ppi_status registers bits too).  As ICDABR0 is banked for PPIs and it cannot be accessed from core 0 I cannot clear them from core 0. Also I haven't been able to clear them at the initializing sequence of core 1 firmware.

If I send a message from core 0 to core 1 before reloading to disable all interrupts it works well always but I need to reolad core 1 firmware in case of core 1 firmware hangs (task not responding i.e.) and in this case interrupts won't be disabled.

I could reset gic from core 0 but I cannot think of the side effects on Linux.

I know this is a issue related to ARM (gic v1.0).

Anyone has some clues of how to clear ICDABRx bits from core 1 or core 0?

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