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amahpour
Observer
Observer
748 Views
Registered: ‎01-28-2015

CAN BUS Example Project Broken

Hi,

I purchased the CAN BUS IP Core and attempted to simulate the example design in Vivado 2019.1. It uses a bunch of COE files but the hookups to the cores themselves are completely wrong (i.e. calling out the wrong port names). Has this example been tested with Vivado 2019.1? Is there something I am missing here?

Thanks,

Ari

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6 Replies
venui
Moderator
Moderator
695 Views
Registered: ‎04-09-2019

Hi,

Can you please elaborate your problem, are you facing the issue while running an example from SDK? or please explain completely what are you trying?

Regards,

Venu

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nwillard
Contributor
Contributor
673 Views
Registered: ‎10-13-2015

Customer receives error messages when trying to create CAN "IP Example Design"

TCL thread:

INFO: [open_example_project] Creating new example project...

INFO: [IP_Flow 19-234] Refreshing IP repositories

INFO: [IP_Flow 19-1704] No user IP repositories specified

INFO: [IP_Flow 19-2313] Loaded Vivado IP repository 'C:/Xilinx/Vivado/2019.1/data/ip'.

create_project: Time (s): cpu = 00:00:15 ; elapsed = 00:00:06 . Memory (MB): peak = 853.277 ; gain = 204.934

INFO: [open_example_project] Loading IP Catalog...

INFO: [IP_Flow 19-234] Refreshing IP repositories

INFO: [IP_Flow 19-1700] Loaded user IP repository 'c:/Users/name/code/fpga/common/lin_ahb_v1_iplib'.

INFO: [open_example_project] Importing original IP ...

INFO: [open_example_project] Generating the example project IP ...

INFO: [open_example_project] Adding example synthesis HDL files ...

INFO: [open_example_project] Adding example synthesis miscellaneous files ...

INFO: [open_example_project] Adding example XDC files ...

INFO: [open_example_project] Adding simulation HDL files ...

INFO: [open_example_project] Sourcing example extension scripts ...

create_ip: Time (s): cpu = 00:00:10 ; elapsed = 00:00:12 . Memory (MB): peak = 1866.020 ; gain = 983.254

ERROR: [IP_Flow 19-3478] Validation failed for parameter 'Data COE File(C_ATG_SYSTEM_INIT_DATA_MIF)' with value 'c:/Users/name/Documents/Xilinx' for IP 'atg_lite_agent'. Please browse the file with .coe extension

ERROR: [IP_Flow 19-3478] Validation failed for parameter 'Control COE File(C_ATG_SYSTEM_INIT_CTRL_MIF)' with value 'c:/Users/name/Documents/Xilinx' for IP 'atg_lite_agent'. Please browse the file with .coe extension

ERROR: [IP_Flow 19-3478] Validation failed for parameter 'Mask COE File(C_ATG_SYSTEM_INIT_MASK_MIF)' with value 'c:/Users/name/Documents/Xilinx' for IP 'atg_lite_agent'. Please browse the file with .coe extension

ERROR: [IP_Flow 19-3478] Validation failed for parameter 'Address COE File(C_ATG_SYSTEM_INIT_ADDR_MIF)' with value 'c:/Users/name/Documents/Xilinx' for IP 'atg_lite_agent'. Please browse the file with .coe extension

INFO: [IP_Flow 19-3438] Customization errors found on 'atg_lite_agent'. Restoring to previous valid configuration.

INFO: [Common 17-17] undo 'set_property'

ERROR: [open_example_project] Open Example Project failed: Error encountered while sourcing custom IP example design script.

ERROR: [Common 17-39] 'set_property' failed due to earlier errors.

 

    while executing

"rdi::add_properties -dict {CONFIG.C_ATG_MODE AXI4-Lite CONFIG.C_ATG_SYSTEM_INIT_ADDR_MIF c:/Users/name/Documents/Xilinx CONFIG.C_ATG_SYSTEM_INI..."

    invoked from within

"set_property -dict [list \

CONFIG.C_ATG_MODE                 {AXI4-Lite} \

CONFIG.C_ATG_SYSTEM_INIT_ADDR_MIF $coe_addr \

CONFIG.C_ATG_SYSTEM_INIT_MASK..."

   

The correct TCL thread should look like:

INFO: [open_example_project] Creating new example project...

INFO: [IP_Flow 19-234] Refreshing IP repositories

INFO: [IP_Flow 19-1704] No user IP repositories specified

INFO: [IP_Flow 19-2313] Loaded Vivado IP repository 'C:/Xilinx/Vivado/2019.2/data/ip'.

create_project: Time (s): cpu = 00:00:14 ; elapsed = 00:00:07 . Memory (MB): peak = 918.043 ; gain = 243.422

INFO: [open_example_project] Importing original IP ...

INFO: [open_example_project] Generating the example project IP ...

INFO: [open_example_project] Adding example synthesis HDL files ...

INFO: [open_example_project] Adding example synthesis miscellaneous files ...

INFO: [open_example_project] Adding example XDC files ...

INFO: [open_example_project] Adding simulation HDL files ...

INFO: [open_example_project] Sourcing example extension scripts ...

INFO: [IP_Flow 19-3484] Absolute path of file 'c:/xlx_2019/temp/can_0_ex/imports/data.coe' provided. It will be converted relative to IP Instance files '../../../../imports/data.coe'

INFO: [IP_Flow 19-3484] Absolute path of file 'c:/xlx_2019/temp/can_0_ex/imports/addr.coe' provided. It will be converted relative to IP Instance files '../../../../imports/addr.coe'

INFO: [IP_Flow 19-3484] Absolute path of file 'c:/xlx_2019/temp/can_0_ex/imports/mask.coe' provided. It will be converted relative to IP Instance files '../../../../imports/mask.coe'

INFO: [IP_Flow 19-3484] Absolute path of file 'c:/xlx_2019/temp/can_0_ex/imports/ctrl.coe' provided. It will be converted relative to IP Instance files '../../../../imports/ctrl.coe'

-Neil

 

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venui
Moderator
Moderator
660 Views
Registered: ‎04-09-2019

Hi,

That is error part, i am asking you add me details about the IP configuration along with your Vivado project to understand your flow.

Regards,

Venu

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amahpour
Observer
Observer
620 Views
Registered: ‎01-28-2015

I think the problem is more fundamental than we think. I start an example Zynq project, right click an IP core and select "Open IP Example Design..." and it fails with the error messages you see above. This happens with every core using Vivado 2019.1 in both Windows 10 and Ubuntu 18.04. As a result the project build phase (off the tcl scripts in the example folders) never complete properly. Is this a known issue with Vivado 2019.1? 

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nwillard
Contributor
Contributor
615 Views
Registered: ‎10-13-2015

The CAN IP doesn't have much to configure. Ari can correct me, but I think he was using the default IP settings. This setup worked for me in the 2019.2 tool set.

nwillard_0-1601502882158.png

 

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amahpour
Observer
Observer
586 Views
Registered: ‎01-28-2015

So I just discovered that if I start Vivado without a project and create an example design through the Manage IP link then everything seems to work fine. There's some issue with running it from another project.

Could there be some sort of setting that is causing trouble here?

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