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derickshi
Adventurer
Adventurer
764 Views
Registered: ‎11-25-2015

Can not connect full AXI interface of my IP to HP slave interface

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Hello community,

 

I'm trying to implement a simple project on my ZC706 board. The basic idea is to have an HLS generated IP which has two full AXI interfaces. One of the AXI interface will be connected to the DDR3 controller of PL, and another AXI interface will be connected to the DDR3 controller of PS.

 

My problem is: When I trying to connect the AXI interface of my IP core to HP0 port of PS, Vivado says that these interfaces don't match. If I use connection automation, the only choice will be the mig on the PL side. How should I connect my IP to the HP port?

Untitled.png 

Thanks in advance,

 

Derick

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zyanwu
Observer
Observer
886 Views
Registered: ‎12-14-2013

Oh, sorry! My bad, that's totally wrong.

 

You can't connect them directly, you need to use a SmartConnect or an Interconnect

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zyanwu
Observer
Observer
742 Views
Registered: ‎12-14-2013

Can you try the following TCL command and post the error messages?

 

connect_bd_intf_net -boundary_type upper [get_bd_intf_pins vecDotProd_0/m_axi_V1] [get_bd_intf_pins processing_system7_0/S_AXI_HP0]
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zyanwu
Observer
Observer
887 Views
Registered: ‎12-14-2013

Oh, sorry! My bad, that's totally wrong.

 

You can't connect them directly, you need to use a SmartConnect or an Interconnect

View solution in original post

derickshi
Adventurer
Adventurer
730 Views
Registered: ‎11-25-2015
Thanks, I tried using AXI smartconnect and it works. I guess it is a small bug of Vivado since it should be able to instantiate the interconnect automatically when using connection automation.
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