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francocapraro12
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Registered: ‎09-27-2018

Configure a S_AXI_CTRL in PL

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Hello. I want to know if is possible (and how) configure the S_AXI_CTRL axi's, for example a Test Pattern Generator has an S_AXI_CTRL. Normally the config is a task for the PS part, but i want to configure it in the PL part through a verilog module. 

Best,
FC

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florentw
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Registered: ‎11-09-2015

Hi @francocapraro12 

Yes this is possible. This is only AXI4 transactions. So you just have to send AXI write transactions to configure the TPG.

Regards


Florent
Product Application Engineer - Xilinx Technical Support EMEA
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florentw
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Registered: ‎11-09-2015

Hi @francocapraro12 

Yes this is possible. This is only AXI4 transactions. So you just have to send AXI write transactions to configure the TPG.

Regards


Florent
Product Application Engineer - Xilinx Technical Support EMEA
**~ Don't forget to reply, give kudos, and accept as solution.~**

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francocapraro12
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Registered: ‎09-27-2018

Thank you so much. About the data to send with AXI write transactions , i can see it in the IP Cores documentations ?
Best,
FC

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florentw
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Registered: ‎11-09-2015

Hi @francocapraro12 

Yes this is in the documentation for the TPG. For example if you want to start the TPG and keep it running, write 0x81 to the address 0x0000:

florentw_0-1625557443911.png

 


Florent
Product Application Engineer - Xilinx Technical Support EMEA
**~ Don't forget to reply, give kudos, and accept as solution.~**
francocapraro12
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Registered: ‎09-27-2018

Hi @florentw . I want to know if you have/know about some example in HLS to do AXI write transactions. I think this can reduce the effort to obtain the transactions. 
Best,

FC

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florentw
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Registered: ‎11-09-2015

HI @francocapraro12 

There are probably some examples. You might want to ask on a new topic on the HLS board you will probably get an answer


Florent
Product Application Engineer - Xilinx Technical Support EMEA
**~ Don't forget to reply, give kudos, and accept as solution.~**