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Observer
Observer
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Registered: ‎03-05-2012

DDR3L with no termination resistors

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Hi,

 

I am in the process of designing a board based on the Zynq XC7Z010 with a single 16 bit DDR3L device. As this is a battery powered device, I am looking at ways to reduce power consumption.

 

Has anyone successfully used DDR3(L) with the Zynq with no parallel termination to VTT? According to Micron's DDR3 Point-Point design guide (http://www.micron.com/~/media/documents/products/technical-note/dram/tn4113_ddr3_point_to_point_design.pdf) p15, "tree without series R generally provides acceptable signal qualilty". This seems to be with multiple devices, so with just 1 device my gut feeling is that it should be fine. It would be great to get someone's more experienced feedback to know if this sounds reasonable.

 

Note, I do not necessarily intend to run the DDR3 at the maximum available frequency, although I don't know exactly what will be required at this point.

 

I note that the TI BeagleBone Black uses a single DDR3 device with no termination, but I have not seen any reference to anyone acheiving this with the Zynq.

 

Thanks in advance

 

Will Platts

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Scholar
Scholar
19,704 Views
Registered: ‎11-09-2013

Re: DDR3L with no termination resistors

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the speed setting makes no difference :(

 

the issue what may happen are OVERSHOOT, and if really bad, they can destroy the DDR chip in a few years. Reducing the data rate makes the overshoot not smaller.

 

micron guide, and some other guide, say that no term can be acceptable as well, and in many cases series term can be better than termination VTT

 

if you have room, then add series R and do not use term to VTT and no VTT regulator. We do like this on our 7010 automotive moduel, that has DDR3 not-L

 

module total power consumption 1.2 - 1.6W

 

DDR3L may save some more.

 

for true battery solution you may have to use -1LI and LPDDR2

 

 

View solution in original post

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Scholar
Scholar
19,705 Views
Registered: ‎11-09-2013

Re: DDR3L with no termination resistors

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the speed setting makes no difference :(

 

the issue what may happen are OVERSHOOT, and if really bad, they can destroy the DDR chip in a few years. Reducing the data rate makes the overshoot not smaller.

 

micron guide, and some other guide, say that no term can be acceptable as well, and in many cases series term can be better than termination VTT

 

if you have room, then add series R and do not use term to VTT and no VTT regulator. We do like this on our 7010 automotive moduel, that has DDR3 not-L

 

module total power consumption 1.2 - 1.6W

 

DDR3L may save some more.

 

for true battery solution you may have to use -1LI and LPDDR2

 

 

View solution in original post

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Observer
Observer
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Registered: ‎03-05-2012

Re: DDR3L with no termination resistors

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Hi Trenz-al

 

Thanks, that is interesting. I assume series R is only on Addr/Ctrl lines, using on-die termination for the data bits?

Do you use approx 10R as on micron guide? What characteristic impedance have you used for the tracks? Currently I have 40R single ended and 80R diff, as per UG933 p62.

 

Thanks for the info on your system power - was there much else on the board other than the 7010?

 

Will

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Scholar
Scholar
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Registered: ‎11-09-2013

Re: DDR3L with no termination resistors

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Hi

 

yes

* 10..22 R series on "addr command control" group

* clock as usual

* data lanes nothing

 

7010

DDR3 16 bit

TI automotive 100mbit PHY

spansion automotive flash

analog mux

safety IC

 

powered from 5V, TI automotive step down DCDC

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Observer
Observer
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Registered: ‎03-05-2012

Re: DDR3L with no termination resistors

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Hi Trenz-Al

 

Interesting, thanks. Do you recall what the characteristic impedance of the traces were?

 

Also, do you place the series termination close to source or destination? Typically would be close to source, but the output drive of the Zynq is already effectively providing source termination?

 

Interesting thought - is it possible to play with PS_DDR_VRP/N to decrease drive strength to reduce overshoot, and would this be equivalent to adding series impedance?

 

Thanks

Will

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Xilinx Employee
Xilinx Employee
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Registered: ‎07-30-2007

Re: DDR3L with no termination resistors

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VRN/VRP is not used in Zynq output impedance for DDR3/3L, only for the LPDDR2 HSUL-based standard.

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Scholar
Scholar
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Registered: ‎11-09-2013

Re: DDR3L with no termination resistors

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what you mean?

 

UG933 says that the VRN/VRP resistors are needed for DDR3 ?

 

UG 933 v1.8 page 54, table 5-2

 

?

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Xilinx Employee
Xilinx Employee
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Registered: ‎07-30-2007

Re: DDR3L with no termination resistors

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Correct, they are needed for inputs.
But they are only used for input termination on the DQ/DQS lines, which are disabled when driving out of Zynq. This discussion is about the output-only address/control lines which usually have physical termination on the board. VRN/VRP do not apply for those (it does for LPDDR2, however).
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Scholar
Scholar
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Registered: ‎11-09-2013

Re: DDR3L with no termination resistors

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OK, your post actually says exactly that, but in short contect it may look if the vrn vrp are not needed.

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Observer
Observer
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Registered: ‎03-05-2012

Re: DDR3L with no termination resistors

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Thanks trenz and dylan - very useful and interesting. I've gone for 22R series termination.

 

Will

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Visitor
Visitor
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Registered: ‎05-05-2017

Re: DDR3L with no termination resistors

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Hi!

 

You mention to use 10..22 R series resistors.

However, in your (I suppose) designs, i.e. http://www.trenz-electronic.de/fileadmin/docs/Trenz_Electronic/TE0726/REV03/Documents/SCH-TE0726-03.PDF, as well as in the parallela board 33 R series transistors are used.

 

Given a trace impedance of 40 R and 34 R output impedance, 33 R seems way to large though.

Can anyone shade some light on this discrepancy?

 

Thanks!

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Observer
Observer
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Registered: ‎03-05-2012

Re: DDR3L with no termination resistors

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Not sure about the trenz board, but I have used 22R series resistors and it works fine (at least up to 800MHz from memory). I have only 1 DDR3L chip (using 16 bit wide bus) and there is <15mm between the SOC and the DDR.

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