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mijung
Observer
Observer
5,708 Views
Registered: ‎11-14-2008

DMA Controller on PPC440 on Virtex5

Hello everybody,

 

I'm using one of four DMA engines provided on the Virtex5`s PPC440 to send data from my VHDL design into the processor`s memory. I`ve written a Linux device driver (based on the xlldma device driver in the xilinx_common directory of the xilinx linux git repository), which supports Direct I/O and DMA to user space. I don't know the amount of data I will be receiving in one Local Link frame in advance. I only know that will never be more than 2kB.

 

Now to the problem: If I do a `cat /dev/mydev` cat causes an read system call on my device driver and it provides a 4kB buffer, which spans a page boundary. This results in two buffer descriptors given to the DMA engine. Now, the problem is if all the data received via DMA in the next LocalLink frame fits into the buffer corresponding to the first buffer descriptor, the second one will not be processed by the DMA controller. Before going back to user space I would have to revoke this buffer descriptor from the DMA engine. However, there is the problem that the next DMA transfer might have started already, and it would go into buffer space were it would`nt belong to.

 

Am I doing something conceptually wrong here? Do I always have to know the amount of data I'm going to receive with the next LocalLink frame, to prepare buffer descriptors accordingly?

 

I  can work around this issue by enforcing page alignment for the user space buffer. However, this seems ugly to me and I would be interested to hear about the "correct" solution.

 

Thanks a lot! Michael 

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3 Replies
garazigara
Participant
Participant
4,622 Views
Registered: ‎11-13-2008

Hi,

 

Have you achieve it? 

 

We have a PPC440 based design. We also have a custom IP which has to transfer data to DDR2 via DMA.  We think the best way to achieve this, is to implement a LocalLink using one of the four available DMA engines in PPC440.
 
Could you post the necessary steps or a reference template to implement this design?
 
Thank you in advance,


Borja and Garazi

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brianhill
Xilinx Employee
Xilinx Employee
4,609 Views
Registered: ‎04-23-2008

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gi4you
Contributor
Contributor
4,508 Views
Registered: ‎09-24-2009

Dear Brian,

 

Did you tried to XAPP1129 on below environment?

 

Xilinx Open Source Linux 2.6.31

XPS 11.3

 

I have try to testing, if i added DMA0 link the Linux image was not bootable. 

 

             llink-connected = <&DMA0>;

 

 

Do you have an any idears for Xilinx OSL using custom DMA ?

 

Regards

Kiman,

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