10-15-2020 06:13 AM
Hello, everyone, I'm using AXI DMA in ZCU102, both MM2S and S2MM Channel, simple transfer mode. The question locates in S2MM channel. The master side of S2MM is a FIFO, the slave is PS-DDR.
When the first two times I use S2MM channel to transfer data, it works well. When the third time, the master side of S2MM receives the data of third packets, looks normal and correct. but the data in DDR not change, still keep the previous value. BTW, the third time DMA IOC is asserted and no error flag.
The problem may also happen in the second time, but not often.
Need your help sincerely!
10-19-2020 09:40 PM
Hi @xuhuan1999 ,
Do you have an ILA on S2MM interface? If not, can you please add and check where exactly the data is not modifying (probably before FIFO or after FIFO)?
Is it possible to provide a screenshot of your design and DMA configuration to understand this issue?
10-19-2020 09:40 PM
Hi @xuhuan1999 ,
Do you have an ILA on S2MM interface? If not, can you please add and check where exactly the data is not modifying (probably before FIFO or after FIFO)?
Is it possible to provide a screenshot of your design and DMA configuration to understand this issue?