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Observer
Observer
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Registered: ‎03-23-2017

Full chip reset of Zynq Ultrascale+ from Bare Metal

I would like to do a full system reset (equivalent of a power cycle) of Zynq Ultrascale+ from a bare metal application on the main ARM cores.  I realize this is complex- involving code running on the PMU and talking with it.  Can Xilinx provide a working example of this?  Does such a thing already exist?  It seems like otherwise I have to do days of work for such a basic function.

 

Thanks!

Joe

 

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Xilinx Employee
Xilinx Employee
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Registered: ‎11-05-2019

Hi @jhallen 

If you modify PMUFW according to the following, you will see the RESET execution by the WDT.

PMU Firmware / Example for changing error action for FPD/LPD WDT

Thank you


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Observer
Observer
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Registered: ‎03-23-2017

Is there any solution available that does not require loading custom PMU firmware?

The example you give talks about POR from WDT, but I want POR from a user command handled by code running on the A53.  Are you recommending that I reset the system by preventing WDT updates until it fires?  Is there no more direct way?

Resetting the system seems like a very basic feature, so I'm really hoping for a working example.

Thanks,

Joe

 

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