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Registered: ‎03-25-2021

Generating IPI interrupts with Xilinx


We are trying to configure/generate IPI interrupts on Xilinx ZCU102.
Issue we are facing is that the ISR is not triggered.

Sequence followed for writing/reading IPI registers:
We have 2 applications,

  • Application 1: Interrupt sender application which writes registers in the below sequence:
    i) IER Register, value written (1<<24 i.e Setting bit 24,25,26 one at a time for PL0,PL1,PL2)          // As shown in figure1.  
    ii) TRIG Register, value written (1<<24 i.e Setting bit 24,25,26 one at a time for PL0,PL1,Ll2)        // As shown in figure1.
    iii) OBS Register reading
    iv) IDR Register (this is done only when the applications are exiting) value written (1<<24 i.e Setting bit 24,25,26 one at a time for PL0,Pl1,Pl2)

  • Application 2: ISR handler application
    This application reads the specific IRQ number based on the registers set in the sender app.
Note: For generating the interrupts we created sender and receiver application in which sender application sets the IPI register bits
i.e we are setting bit number 24 i.e 0x1000000. We used PL0 IPI in this and the corresponding IRQ number is 61
(We are able to successfully write these bits to specific registers and have verified this by reading the registers. The base
address currently is 0xFF300000U ).
Issue Observed:
  1.  In receiver application we are attaching corresponding IRQ number 61 using InterruptAttach().
     But in the receiver side we are not able to trigger the specific interrupt that we set in the sender application. The application is getting stuck at MsgReceive() at   the receiver side reason being that correct IRQ was not triggered
  2.  When we tried with sending Channel 0 APU MP Core to the corresponding IRQ67 as shown in Figure2., we are getting the error attached below as Out of interrupt events! Shutdown Error..

                                                                         Figure1 : IPI Interrupt Channel































                                                              Figure2 : Shutdown Error

  • Query:
    Is there anything incorrect we are doing in setting the IPI registers? What could be the possible reason for ISR not getting triggered?



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Registered: ‎10-30-2017

Hi @As2 ,

did you referred the following:

I hope the above wiki page will be the good starting point to your design.



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