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amsanchez
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Registered: ‎03-03-2017

Handling addresses in "XAxiDma_SimpleTransfer"

I have followed a tutorial and I'm able to write and read to and from the DDR through the DMA (taken from here). The code writes and reads 512 MB and if the sent and received data is equal, means that everything has gone well. 

 

My intention now is to extend the code in order to fill all the positions of the external DDR to check them, but I'm not sure how to handle the ddr memory address. The code uses the function "XAxiDma_SimpleTransfer" for the transfer. According to the description, this function does one simple transfer submission and needs:

 

              * @param InstancePtr is the pointer to the driver instance
              * @param BuffAddr is the address of the source/destination buffer
              * @param Length is the length of the transfer
              * @param Direction is DMA transfer direction, valid values are
              * - XAXIDMA_DMA_TO_DEVICE.
              * - XAXIDMA_DEVICE_TO_DMA.

 

If I do not understand wrongly, BuffAddr is the address containing the data to be sent to the ddr, so neither of these parameters is providing the info regarding the destination address in the DDR. Can anyone familiarized with this code tell me how to manage the destination address in the ram? In concrete, my intention is:

 

1. write 512 MB of data in destination address 0x00000000

2. read 512 MB of data from destination address 0x00000000

3. write 512 MB of data in destination address 0x00000200

4. read 512 MB of data from destination address 0x00000200

5...

 

Thanks in advance!

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hbucher
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Registered: ‎03-22-2016

@amsanchez  Remember with XAxiDma you either are transferring data from addressable memory to a stream or from a stream to an addressable memory. In either case you only need one address.

 

Perhaps what you are looking for is the AXI Central DMA.

 

AXI DMA:

https://www.xilinx.com/support/documentation/ip_documentation/axi_dma/v7_1/pg021_axi_dma.pdf

The AXI DMA provides high-bandwidth direct memory access between memory and AXI4-Stream target peripherals. 

AXI Central DMA:

https://www.xilinx.com/products/intellectual-property/axi_central_dma.html

The AXI CDMA provides high-bandwidth Direct Memory Access (DMA) between a memory-mapped source address and a memory-mapped destination address using the AXI4 protocol. 

 

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