08-14-2019 03:03 PM
We are using the AXI DMA IP core on a Zynq device running yocyo generated linux. Occasionally the DMA transfers result in a error and the LogicCORE IP or driver or both hang. We are looking for a way to reset the driver and IP so that we can restart. Attempts at stopping the channels seem to result in nothing good and the IP appears lost or inaccessible or non-reponsive. We cannot do any transfers. If we unload the driver and reload it, that does clear things up but that's not really a solution.
I was wondering if anyone could describe a fail-safe reset sequence for the Xilinx AXI DMA IP that allows the whole SW/HW stack to restart without issue.
08-16-2019 09:21 AM
Subscribed for interest. I see the same problem in Linux. It seems once a DMA receive is configured, it must complete, otherwise a driver unload/reload is required. There doesn't seem to be a clean way to shutdown otherwise. Killing the thread or process before or after stopping the engine doesn't work. I stumbled across an old post somewhere where a guy claimed fixing this involved both an HDL and driver change, but there was no further information so not sure how reliable that info is.
08-16-2019 02:43 PM
I'm not sure it would be possible to reset the DMA mid-transfer. The problem stems from the AXI spec itself. According to the AXI spec, every transaction *must* get a response. There's no way to drop a transaction currently in process if you want to reset things. As a result, if you have a misbehaving slave IP that drops requests--your design is likely to get stuck.
There are a couple solutions to this.
While it's not quite what you are asking for, you may find these cores meet your needs.
08-21-2019 05:59 AM