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Visitor
Visitor
7,882 Views
Registered: ‎08-24-2015

How to use FIFO with Custom IP

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i want to use FIFO in between AXI interconnect and my Custom IP

 

I was trying to add AXI DATA FIFO, AXI FIFO Generator in between AXI Interconnect and my Custom IP in PL. There was no effect of it. Even I tried to add FIFO in beteen ZYNQ PS and AXI interconnect. I am not getting how to use a fifo. Please help me with FIFO.

 

thanks

vivado block diagram.png
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Scholar
Scholar
14,786 Views
Registered: ‎06-14-2012

You can enable the data fifos on the interfaces itself in AXI interconnect settings. If you need to add FIFO for a loopback, you can check this tutorial.

http://www.fpgadeveloper.com/2014/08/using-the-axi-dma-in-vivado.html

 

Regards

Sikta

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Xilinx Employee
Xilinx Employee
7,870 Views
Registered: ‎08-02-2007

hi,

 

is there any specific reason to keep a fifo in between the GP interface and the interconnect?

 

I am trying to understand the use-case here.

 

--hs

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Scholar
Scholar
14,787 Views
Registered: ‎06-14-2012

You can enable the data fifos on the interfaces itself in AXI interconnect settings. If you need to add FIFO for a loopback, you can check this tutorial.

http://www.fpgadeveloper.com/2014/08/using-the-axi-dma-in-vivado.html

 

Regards

Sikta

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Visitor
Visitor
7,860 Views
Registered: ‎08-24-2015

Yes, I am sendinf 14 frames back to back to  my custom IP. IF i write these 14 frames simply, then it skips some frames if i add delay its behaviour is inconsistant, it may skip any frame it may repeate any frame.

so I want FIFO.

 

 

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Visitor
Visitor
7,859 Views
Registered: ‎08-24-2015

@siktap

 

I enabeld those FIFO inside interconnect but I didn't found it effective. I have refered the tutorial that you metioned but I cannot use those FIFO with custom IP.

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Observer
Observer
7,833 Views
Registered: ‎06-03-2015

Is there any other method for implementing fifo in PL Part.

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