01-31-2014 07:20 AM
I've got a design that includes a microblaze generated in Vivado 2013.3. I've exposed to the M_AXI_DP ports to my own logic. I'm noticing odd behavior that I've not seen in other AXI IP. Basically the AWADDRESS and AWVALID/WDATA and WVALID lines are a cycle apart. Why I can solve this by delaying WADDRESS/WVALID a cycle this makes me a tad nervous. Please let me know if you require more information.
Thanks for the help!
01-31-2014 12:14 PM
I am using XPS and have a clock generator with multiple clock outputs and am trying to connect these to other peripherals, specifically a DMA module. The 'help' screen for xps says
"To specify or change the port connectivity, select a new click inside the table cell and select a net from the list of compatible nets in your hardware platform (those having the same class and compatible polarity). "
I left click on the connection cell and nothing happens. Right clicking gives me the option of No Connection, New Connection or Make External. When I select New Connection, the window 'shakes', but nothing else happens. It's as if there is a popup being blocked. Note that this does work properly on another system.
Any ideas? I'm using Windows 7.
01-31-2014 12:40 PM