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Explorer
Explorer
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Registered: ‎09-14-2018

KCU105 IP Integrator example design AXI Quad SPI IP usage

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Hello,

I have Vivado 2018.3. One of the reason I was not able to re-generate the FPGA image from the KCU105 IPI example design was AXI Quad SPI IP. This IP is hooked up to the real QSPI configuration Flash, with the clock driven by FPGA_CCLK. The SPI clock is not in system.xdc file, so, Vivado complaints: not LOC for SPI clock.

When I added clock info in to system.xdc, Vivado complains again (which is correct), that CCLK is not a valid user IO.   So, assigned clock to some unused pin number. Then I was able to generate the bitstream file.

What was the intent and purpose of having such Quad SPI IP in the IPI example design?

Thank you.

1 Solution

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Xilinx Employee
Xilinx Employee
182 Views
Registered: ‎11-05-2019

Re: KCU105 IP Integrator example design AXI Quad SPI IP usage

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Hello @arotenst 

In the KCU105, the CCLK pin of the FPGA is connected to the QPSI memory of the KCU105.
The CCLK pin is a dedicated Configuration pin.
It is not possible to drive the CCLK pin directly from the User Logic.
The CCLK pin can be driven via the STARTUPEx primitive.

For AXI-QPSI IPs, the STARTUPEx primitive can also be used to drive the CCLK pin.
I think the XAPP1280 with KCU105 would be a good tip.

Thank you


Don't forget to reply, kudo, and accept as solution.

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Xilinx Employee
Xilinx Employee
183 Views
Registered: ‎11-05-2019

Re: KCU105 IP Integrator example design AXI Quad SPI IP usage

Jump to solution

 

Hello @arotenst 

In the KCU105, the CCLK pin of the FPGA is connected to the QPSI memory of the KCU105.
The CCLK pin is a dedicated Configuration pin.
It is not possible to drive the CCLK pin directly from the User Logic.
The CCLK pin can be driven via the STARTUPEx primitive.

For AXI-QPSI IPs, the STARTUPEx primitive can also be used to drive the CCLK pin.
I think the XAPP1280 with KCU105 would be a good tip.

Thank you


Don't forget to reply, kudo, and accept as solution.

View solution in original post

Highlighted
Explorer
Explorer
156 Views
Registered: ‎09-14-2018

Re: KCU105 IP Integrator example design AXI Quad SPI IP usage

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Thank you.

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