cancel
Showing results for 
Show  only  | Search instead for 
Did you mean: 
Highlighted
Adventurer
Adventurer
301 Views
Registered: ‎10-18-2019

MIO and XADC pins in ZYNQ 7Z030

Jump to solution

I am working with PCB layout for XC7Z030FFG676 package.

I know that PS_MIO[0:15] located in MIO Bank 500 and PS_MIO[16:53] located in MIO Bank 501 but how about pin map of MIO pins to UART, Ethernet, and SPI. In which document I can find the pin mapping ?

I am also looking for pin assignment of XADC differential channels VAUXP/N [0:15] to the XC7Z030FFG676 package. 

 

 

 

 

 

 

Tags (2)
1 Solution

Accepted Solutions
Highlighted
Xilinx Employee
Xilinx Employee
241 Views
Registered: ‎11-05-2019

 

Hi @peterjohn 

 

UART, Ethernet, and SPI pins are Multiplexed and can be assigned to any MiO.

Regarding the allocation of MIO, it is good to see "2.5.4 MIO-at-a-Glance Table" of UG585 "Zynq-7000 SoC Technical Reference Manual".

Before fixing the pin assignments on the board,

 it is also recommended to use Vivado to verify MiO assignment is possible and refer to the schematic of the evaluation board.

 

Please refer UG865 "Zynq-7000 SoC Packaging and Pinout Product Specification" for the XADC pins.

ASCII files are available here.

 

Thank you


Don't forget to reply, Kudo, and Accept as Solution.

View solution in original post

1 Reply
Highlighted
Xilinx Employee
Xilinx Employee
242 Views
Registered: ‎11-05-2019

 

Hi @peterjohn 

 

UART, Ethernet, and SPI pins are Multiplexed and can be assigned to any MiO.

Regarding the allocation of MIO, it is good to see "2.5.4 MIO-at-a-Glance Table" of UG585 "Zynq-7000 SoC Technical Reference Manual".

Before fixing the pin assignments on the board,

 it is also recommended to use Vivado to verify MiO assignment is possible and refer to the schematic of the evaluation board.

 

Please refer UG865 "Zynq-7000 SoC Packaging and Pinout Product Specification" for the XADC pins.

ASCII files are available here.

 

Thank you


Don't forget to reply, Kudo, and Accept as Solution.

View solution in original post