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borial
Observer
Observer
2,857 Views
Registered: ‎05-14-2013

MicroBlaze ignore LMB Sl_Ready when write IO Module?

Hello,

    When I simulate the io module's io bus, found the LMB can not support wait transaction of SWI. 

    Refer the following waveform, the dlmb's LMB interface to iomodule is forced to always wait and no ready.

    But the Microblaze still can issue a lot write access since the D_Ready signal never valid.

    Does I have to enable the Microblaze's fault tolerence function to support LMB wait?

    Thanks a lot.

LMB_Bug1.PNG

 

    Btw, the Microblaze is version 9.2, tool is vivado 2013.4

 

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borial
Observer
Observer
2,856 Views
Registered: ‎05-14-2013

please open the picture in a new tab to get a entire view
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goran
Xilinx Employee
Xilinx Employee
2,841 Views
Registered: ‎08-06-2007

Hi,

 

Trying to see what is happening on the waveform.

 

This is roughly how MicroBlaze access is done.

1. It will in parallel do a request (D_AS) to LMB and to the internal caches

2. If none is responding with ready or holding wait, MicroBlaze assumes that neither wants the access and will use the standard DAXI interface instead.

 

LMB has to respond in the cycle after AS with either Ready or Wait if that access is for LMB.

 

 

Göran

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