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Contributor
Contributor
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Registered: ‎11-19-2018

Programming the Si5382 on the ZCU111

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I have a ZCU111 board in which I am trying to generate a 125 MHz clock driven to a MAC that utilizes the SFP. This implies the use of the Si5382 device.

I can program the device through the system controller GUI but would like to have it done by the Ultrascale+ processors, ideally in the FSBL.

Is there any Xilinx source code that programs the Si5382?

If not, I'm assuming that I could dump the contents of the Silicon Labs ClockBuilder Pro file to the device via I2C. Is that a correct assumption?

 

Thanks

Doug Bailey

 

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Contributor
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Registered: ‎11-19-2018

I ended up modifying the FSBL using the 2018.3 SDK FSBL template. I added the enclosed files and hooked them in the board init function. (Using the preestablished hook function was too late in the initialization process.)

The actual register data values that I used were generated from the export function of the Silicon Labs ClockBuilder Pro. I modified the array of data to add a marker for where to add a 700 mS delay and where to mark the end of the array.

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Registered: ‎09-12-2007
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Observer
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Registered: ‎10-06-2018

I have the same task to do, although I need 156.25 MHz as  a ref clock for a 10G SPF ethernet PHY and want to program the Si5382 from the RPU r5. Do you may be have some C code you can share ?

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Contributor
Contributor
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Registered: ‎11-19-2018

I ended up modifying the FSBL using the 2018.3 SDK FSBL template. I added the enclosed files and hooked them in the board init function. (Using the preestablished hook function was too late in the initialization process.)

The actual register data values that I used were generated from the export function of the Silicon Labs ClockBuilder Pro. I modified the array of data to add a marker for where to add a 700 mS delay and where to mark the end of the array.

View solution in original post