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Contributor
Contributor
6,473 Views
Registered: ‎09-02-2013

QSPI Flash upgrade after Secure Boot

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I have programmed the PL eFUSE array with our key.  I am able to securely boot my development system from QSPI.  I read in XAPP1175 Pages 68-69 that discusses how to re-enable JTAG and DAP.  Once I change the bits in 0xF8007000 as defined in the TRM and XAPP1175, I can see the JTAG chain in iMPACT.  I am not able to get the Program Flash (zynq_flash) to work to upgrade my QSPI Flash.

 

Either I am missing something or the tool (zynq_flash) doesn't like the device being in secure boot mode.  I can't seem to find any further information that will help me to solve the issue.  I am planning on getting an in field upgrade driver written to program the QSPI through my software, but don't have that in my current flashed program.  

 

My log file from SDK 14.5 is:

zynq_flash -f C:\Projects\SmartTracker\Encryption\trial\STTest_Open.mcs -offset 0 \
-flash_type qspi_single -verify
flash_type=qspi_single, image=C:\Projects\SmartTracker\Encryption\trial\STTest_Open.mcs
Info:Connecting to TCF agent...
Info:Digilent Plugin: Plugin Version: 2.4.4
Info:Digilent Plugin: no JTAG device was found.
Info:AutoDetecting cable. Please wait.
Info:*** WARNING ***: When port is set to auto detect mode, cable speed is set to default 6 MHz regardless of explicit arguments supplied for setting the baud rates
Info:Connecting to cable (Usb Port - USB21).
Info:Checking cable driver.
Info: Driver file xusb_xp2.sys found.
Info: Driver version: src=2301, dest=2301.
Info: Driver windrvr6.sys version = 10.2.1.0.Info: WinDriver v10.21 Jungo (c) 1997 - 2010 Build Date: Aug 31 2010 x86_64 64bit SYS 14:14:44, version = 1021.
Info: Cable PID = 0008.
Info: Max current requested during enumeration is 300 mA.
Info:Type = 0x0005.
Info: Cable Type = 3, Revision = 0.
Info: Setting cable speed to 6 MHz.
Info:Cable connection established.
Info:Firmware version = 2401.
Info:File version of C:/Xilinx/14.5/ISE_DS/ISE/data/xusb_xp2.hex = 2401.
Info:Firmware hex file version = 2401.
Info:PLD file version = 200Dh.
Info: PLD version = 200Dh.
Info:Type = 0x0005.
Info:ESN option: 00001631C18401.
Info:Opened cable successfully
Info:Obtained cable lock
Info:idcode is 0x4ba00477
Info:idcode is 0x23727093
Info:Found 2 devices
Info:AutoDetecting cable. Please wait.
Info:*** WARNING ***: When port is set to auto detect mode, cable speed is set to default 6 MHz regardless of explicit arguments supplied for setting the baud rates
Info:Connecting to cable (Usb Port - USB21).
Info:Checking cable driver.
Info: Driver file xusb_xp2.sys found.
Info: Driver version: src=2301, dest=2301.
Info: Driver windrvr6.sys version = 10.2.1.0.Info: WinDriver v10.21 Jungo (c) 1997 - 2010 Build Date: Aug 31 2010 x86_64 64bit SYS 14:14:44, version = 1021.
Info: Cable PID = 0008.
Info: Max current requested during enumeration is 300 mA.
Info:Type = 0x0005.
Info: Cable Type = 3, Revision = 0.
Info: Setting cable speed to 6 MHz.
Info:Cable connection established.
Info:Firmware version = 2401.
Info:File version of C:/Xilinx/14.5/ISE_DS/ISE/data/xusb_xp2.hex = 2401.
Info:Firmware hex file version = 2401.
Info:PLD file version = 200Dh.
Info: PLD version = 200Dh.
Info:Type = 0x0005.
Info:ESN option: 00001631C18401.

JTAG chain configuration
--------------------------------------------------
Device   ID Code        IR Length    Part Name
 1       4ba00477           4        Cortex-A9
 2       23727093           6        XC7Z020

--------------------------------------------------
Enabling extended memory access checks for Zynq.
Writes to reserved memory are not permitted and reads return 0.
To disable this feature, run "debugconfig -memory_access_check disable".

--------------------------------------------------

CortexA9 Processor Configuration
-------------------------------------
Version.............................0x00000003
User ID.............................0x00000000
No of PC Breakpoints................6
No of Addr/Data Watchpoints.........4
ERROR(1):
    Could not power-up the DAP (CTRL_STAT=0xffffffff)

ERROR(1):
    AP transaction timeout (ACK=0x07, Expected=0x02)

ERROR(1):
    Could not stop the processor after reset

 

I also tried this in SDK 14.6 and had the following log file:

zynq_flash -f C:\Projects\SmartTracker\Encryption\trial\STTest_Open.mcs -offset 0 \
-flash_type qspi_single -verify
Info:Connecting to TCF agent...
Info:Attempting to launch hw_server...
Info:

****** Xilinx hw_server v2013.2

  **** Build date : Jun  3 2013-13:13:02

    ** Copyright 1986-1999, 2001-2013 Xilinx, Inc. All Rights Reserved.



INFO: hw_server application started

INFO: Use Ctrl-C to exit hw_server application



INFO: Set the HW_SERVER_ALLOW_PL_ACCESS environment variable to 1 to access any PL address memory in the TCF debugger memory window.




Info:Opened cable successfully
Info:Obtained cable lock
Info:idcode is 0x4ba00477
Info:idcode is 0x23727093
Info:Found 2 devices

JTAG chain configuration
--------------------------------------------------
Device   ID Code        IR Length    Part Name
 1       4ba00477           4        Cortex-A9
 2       23727093           6        XC7Z020

--------------------------------------------------
Enabling extended memory access checks for Zynq.
Writes to reserved memory are not permitted and reads return 0.
To disable this feature, run "debugconfig -memory_access_check disable".

--------------------------------------------------

CortexA9 Processor Configuration
-------------------------------------
Version.............................0x00000003
User ID.............................0x00000000
No of PC Breakpoints................6
No of Addr/Data Watchpoints.........4
ERROR(1):
    Cannot access JTAG-DP: invalid ACK value (0x07, expected=0x02)
ERROR(1):
    Cannot access JTAG-DP: invalid ACK value (0x07, expected=0x02)

ERROR(1):
    Could not stop the processor after reset

 Not sure where to look next to allow me to re-program my QSPI Flash.  Any help would be appreciated.

 

Bill

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Contributor
Contributor
8,539 Views
Registered: ‎09-02-2013

That is a valid option that I had thought of.  For my system this would require removal from the housing and rework on the board to allow that.  I was able to get support from Xilinx.  There is an environment variable that can be set to disable the tools from reseting the ZYNQ as they flash the QSPI.  The environment variable XIL_CSE_ZYNQ_SKIP_RESET needs to be set to a value of 1.  This worked for me.

 

Thanks for the reminder about JTAG boot option!

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Xilinx Employee
Xilinx Employee
6,463 Views
Registered: ‎07-31-2008

Using the Flash Programming utility in SDK resets Zynq which means that you lose the JTAG chain (that you manually enabled) on the reboot.

 

Switch to JTAG boot mode before reprogramming the QSPI flash.

 

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Contributor
Contributor
8,540 Views
Registered: ‎09-02-2013

That is a valid option that I had thought of.  For my system this would require removal from the housing and rework on the board to allow that.  I was able to get support from Xilinx.  There is an environment variable that can be set to disable the tools from reseting the ZYNQ as they flash the QSPI.  The environment variable XIL_CSE_ZYNQ_SKIP_RESET needs to be set to a value of 1.  This worked for me.

 

Thanks for the reminder about JTAG boot option!

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Observer
Observer
2,803 Views
Registered: ‎06-13-2014

BTW, this was a case of pilot error on my part, but for anyone new to the system, I got this same error message:

 

ERROR(1):
    Cannot access JTAG-DP: invalid ACK value (0x07, expected=0x02)
ERROR(1):
    Cannot access JTAG-DP: invalid ACK value (0x07, expected=0x02)

 

When I tried running a ps7_init.tcl generated by the 2015.X SDK using a 2014.4 xmd. Switched to 2015 SDK tools all around, and the error went away.

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