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Registered: ‎12-12-2017

R5 vs A53 in Ultracsale+

What is the difference between R5 and A53 in terms of its usage in ultrascale+?

 

There are various peripheral blocks like SPI, UART, PCIe, I2C, etc., present in ultrascale+ device. Can both of the R5 and A53 able to access those all peripherals?

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Xilinx Employee
Xilinx Employee
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Registered: ‎08-01-2008

yes both architecture support peripheral blocks like SPI, UART, PCIe, I2C, etc., present in ultrascale+ device

 

These peripheral  supported by all the  CPU Arch i.e. cortex-a9 (default) • cortex-a53 • cortex-r5 • microblaze 

 

https://www.xilinx.com/support/documentation/sw_manuals/xilinx2017_2/ug1027-sdsoc-user-guide.pdf

Thanks and Regards
Balkrishan
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Registered: ‎12-12-2017

What are the differences among them in terms of its usage?

Is there any special features that can be applicable only to R5 or A53?

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