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Adventurer
Adventurer
1,155 Views
Registered: ‎10-11-2017

SDK debug:can't stop at main()

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Hello everyone!

I creat block design include Microblaze,AXI QUAD SPI and AXI GPIO.When I debug my code in SDK,I found a strange problem.Here is my code.

 

#include "xparameters.h"
#include"xspi.h"
#include "xspi_l.h"
#include"xgpio.h"

#define SPI_MASTER_ID XPAR_SPI_0_DEVICE_ID
#define LED_ID XPAR_GPIO_0_DEVICE_ID
#define LED_CHANNEL 1
#define LED 1

int main(void)
{
XSpi spi_master;
XGpio led;
u32 ControlReg;
u32 StatusReg;
u32 GlobalIntrReg;
int Status;

XSpi_Config *ConfigPtr;
ConfigPtr = XSpi_LookupConfig(SPI_MASTER_ID);
if(ConfigPtr==NULL){
return XST_FAILURE;
}

Status = XSpi_CfgInitialize(&spi_master, ConfigPtr,ConfigPtr->BaseAddress);
if (Status != XST_SUCCESS) {
return XST_FAILURE;
}

/************GPIO***************/
Status=XGpio_Initialize(&led,XPAR_GPIO_0_DEVICE_ID);
if (Status != XST_SUCCESS) {
return XST_FAILURE;
}
XGpio_SetDataDirection(&led,LED_CHANNEL,~LED);
XGpio_DiscreteWrite(&led,LED_CHANNEL,LED);
return XST_SUCCESS;
}

 

When I debug my code,I found it don't stop at main(),It stops at :

4.png

This scentence is in the founction XSpi_InterruptHandler(...),But I didn't call this function in my code.I don't konw why this is happen.

However.when I delete the scentence:

Status = XSpi_CfgInitialize(&spi_master, ConfigPtr,ConfigPtr->BaseAddress);

It can stop at main(...) normally.I don't know what's wrong with this scentence.

Can anybody help me?

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1 Solution

Accepted Solutions
Adventurer
Adventurer
1,594 Views
Registered: ‎10-11-2017
I have solved it.

I found that when configure Microblaze without check 'Use Instruction and Data Caches',it will work normally.

But I don't konw why.

View solution in original post

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2 Replies
Adventurer
Adventurer
1,595 Views
Registered: ‎10-11-2017
I have solved it.

I found that when configure Microblaze without check 'Use Instruction and Data Caches',it will work normally.

But I don't konw why.

View solution in original post

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Highlighted
Xilinx Employee
Xilinx Employee
1,105 Views
Registered: ‎02-01-2008

I responded to your other thread that includes a block diag. I expect you are running your application from LMB bram so you want to make sure that the microblaze cache controller address range does not include the address range of LMB.

 

And as mentioned on the other thread, you do not have QSPI XIP enabled and you do not have axi4 bram controller or DDR in your design so there is no reason to have cache enabled.

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