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Observer
Observer
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Registered: ‎03-15-2018

SPI bus on PS part of the zynq MPSoC

Hello,

I'm trying to use SPI bus on the ZCU102 board with a SPI ram memory device on a PMOD board. The Zynq is programmed as the SPI Master.

I've routed 4 lines of the SPI from the PS to EMIO: MOSI;MISO;SS,SCK.

I'm not running with Linux or in Bare Metal mode, but with a real time OS. The interface doesn't work,

I've read the TRM about this topics, but I have some questions :

The RPLL being programmed to 200Mhz.  The BAUD_RATE_DIV must be equal or high to 8 (25Mhz max). Is it correct ?

In my first test I'm just trying to read the device identification.To get this word (4 bytes long) , I need to send a one byte opcode (0x9F). My question is about the SCKL line : How many bytes I have to send to the TX_FIFO  (1 or 5) to maintain active the clock ?

In this case will l get 5 bytes in the FIFO ( 1 byte  = 0xFF which is the value acquires of the MISO line during opcode sending and 4 bytes from the memory device ) ?

Thanks for your help.

Philippe.

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Moderator
Moderator
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Registered: ‎04-09-2019

Hi,

We need to send/write1byte as a command followed by that need to receive/read a 4 bytes of device ID.

Inorder to read 4 bytes of data, we need to write 4 bytes of dummy data followed by the command.

So you need to write 5 Bytes of the data into the TXFIFO to maintain active clock.

 

Thanks & Regards,

Venu

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