04-04-2019 01:35 PM - edited 04-05-2019 08:41 AM
I am able to get the system ready with the 8-channel lwIP on z702 board. I took the example from,
Though this example has 8 cahnnels in block design, only one ETH channel is active in the SDK. I want to update this project to all 8-channels working simultaniously.
Just wanted to know if any one has tried this out or any suggestions on how to update this example to work with all 8 channels.
Thanks in advance,
04-07-2019 10:36 PM
Hi @yogesh ,
The ethernet FMC card is 4 x Ethernet interface extension + ZC702 board has one ethernet port that is 5 total.
Where are you getting rest of 3 ethernet channel from?
You may have to refer to ethernetfmc application if they have modified for 4 ports and do similar upgrade.
04-08-2019 05:19 AM - edited 04-08-2019 05:20 AM
If you follow the github link that i posted earlier, will have 8 ETH IP in block diagram and SDK c++ application which has the lwIP stack.
This can run with 2 ethernetFMC on Z702, which will technically give 8 ehternet channels. But, the c++ application is writen to activate only one at any given point in time.
Yes, there is one more ETH peripherial which is directly on the A9 core. So, this can give 9 ETH channels.
However i am still exploring on modifying this example to work with multiple ports at a time.
04-09-2019 03:40 AM
Hi @yogesh ,
I would suggest to check with EthernetFMC who is supplying this card for modified applications for more channels.
Else you need to do similar to single channel multiple times as suggest in https://github.com/fpgadeveloper/ethernet-fmc-zynq-gem/tree/master/SDK.