04-30-2013 05:07 PM
I have two different set of V5FXT30 (-1 speed grade) boards. Board A was built about 3 years ago. Board B one was built recently. The bit file which was used on Board A doesn't run on Board B, and this bit has PPC440 to run at 400MHz. The interfaces are Hard EMAC, DDR2, Flash, LED, and UART. There are no changes on PCB for these interface. On Board A, the PPC440 runs at 400MHz. On Board B, I was able to make PPC440 run upto 385MHz. At 400MHz on Board B, the PPC hangs as lwip_echo example launches. There are no timing violation. I tried over constraining and floor planning, but nothing made work at 400MHz. When it hangs, I cannot peek or poke through JTAG.
Is it possible that PPC440 may have degraded silicon? Has anyone run into such issue?
Thanks in advance.
05-06-2013 10:03 AM
Sorry for the delay in a response.
I have never heard of the performance changing over time. Have you checked the Vccint voltage? The performance is very tightly coupled to the Vccint level. A change of -5% or less could be the cause. Or, you do not have all the paths properly constrained.
Also, what is the junction temperature? Is it below 85C?
Did the board work, at one time?
05-06-2013 05:48 PM
First, thanks for replying back to this thread.
The board is tested under room temperature, and case temperature is about 40C(warmer side). All the rails are within the margin. Board A was made about 3 years ago. Board B was made about 4 months ago. The fab house and assembly house are new for new builds between Board A and B. When I started this problem, I thought it was PCB related. When I probed the PCB for signals and timing margin, I didn't find anything out of ordinary. The signals look good for GMII and DDR signals. If I ran just memory test example with hello word only, PPC did run at 400MHz. It passed DDR2 memory test running at 400MHz. It also passed the flash memory test too. When I ran lwip_echo example, PPC just hangs at start.
I have attached UCF file and it was initially based on Avnet's reference design of V5FXT. I did check the timing constraints against Hard MAC IP and DDR2 MC IP, and the timing constraints are there per IP datasheet. I hope I'm missing some constraints, but I can't find what I am missing. Also, I didn't find the constraint requirements for PPC440, and I'm assuming XPS compensates this. But, is there one? Can you take a look at the attached UCF file?
I was able to make PPC run from 300MHz to 385MHz, and I haven't tried below 300MHz.
05-07-2013 07:13 AM
Take a look at the ucf files in the demo designs for boards with the ppc.
It may very well be a bad device (test escape), I can't rule that out. If you wish to go down that route, contact the distributor that you purchased it from, and request to start the RMA process. More than likely they will ask you to work with a Xilinx FAE BEFORE removing the device (90% of RMA devices have no problems found when they get here, so the 'problem' was the pcb....)